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Yao-Pin Wang

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2020 – today

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2020
[c3]
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  dblp key:
  - conf/globecom/WangWKHLY20
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  - https://dblp.org/rec/conf/globecom/WangWKHLY20
Yao-Pin Wang, Chi-Chih Wen, Chen-Chien Kao, Chung-Jung Huang, Der-Zheng Liu, Chia-Hsiang Yang:
Iterative Receiver with a Lattice-Reduction-Aided MIMO Detector for IEEE 802.11ax. GLOBECOM 2020: 1-6
[c2]
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  - conf/vlsi-dat/ChiuehYWYCHCWCL20
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Herming Chiueh, Chia-Hsiang Yang, Charles H.-P. Wen, Chao-Guang Yang, Po-Hao Chien, Ching-Yang Hung, Yu-Jui Chen, Yao-Pin Wang, Chin-Fong Chiu, Jer Lin:
Radiation-Harden RISC Processor for Micro-Satellites in Standard CMOS. VLSI-DAT 2020: 1-2

2010 – 2019

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2019
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Yu-Zhe Wang, Yao-Pin Wang, Yi-Chung Wu, Chia-Hsiang Yang:
A 12.6 mW, 573-2901 kS/s Reconfigurable Processor for Reconstruction of Compressively Sensed Physiological Signals. IEEE J. Solid State Circuits 54(10): 2907-2916 (2019)
2018
[c1]
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Yu-Zhe Wang, Yao-Pin Wang, Yi-Chung Wu, Chia-Hsiang Yang:
A 12.6MW 573-2, 901KS/S Reconfigurable Processor for Reconstruction of Compressively-Sensed Phvsiological Signals. VLSI Circuits 2018: 261-262

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