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Ahmed Kamaleldin
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2020 – today
- 2024
- [c12]Ahmad Othman, Ahmed Kamaleldin, Diana Göhringer:
AMPER-X: Adaptive Mixed-Precision RISC-V Core for Embedded Applications. NorCAS 2024: 1-7 - [c11]Ahmed Kamaleldin, Matthias Nickel, Sisi Wu, Diana Göhringer:
Seamless Cache Extension for FPGA-based Multi-Core RISC-V SoC. SOCC 2024: 1-6 - 2023
- [b1]Ahmed Kamaleldin:
A Modular Platform for Adaptive Heterogeneous Many-Core Architectures. Dresden University of Technology, Germany, 2023 - 2022
- [j2]Ahmed Kamaleldin, Diana Göhringer:
AGILER: An Adaptive Heterogeneous Tile-Based Many-Core Architecture for RISC-V Processors. IEEE Access 10: 43895-43913 (2022) - [c10]Ahmed Kamaleldin, Diana Göhringer:
A Hybrid Memory/Accelerator Tile Architecture for FPGA-based RISC-V Manycore Systems. FPL 2022: 300-306 - [c9]Ahmed Kamaleldin, Diana Göhringer:
An Agile Tile-based Platform for Adaptive Heterogeneous Many-Core Systems. FPT 2022: 1-4 - 2021
- [c8]Ahmed Kamaleldin, Diana Göhringer:
Design For Agility: A Modular Reconfigurable Platform for Heterogeneous Many-Core Architectures. FPL 2021: 265-266 - [c7]Najdet Charaf, Ahmed Kamaleldin, Martin Thümmler, Diana Göhringer:
RV-CAP: Enabling Dynamic Partial Reconfiguration for FPGA-Based RISC-V System-on-Chip. IPDPS Workshops 2021: 172-179 - 2020
- [j1]Ahmed Kamaleldin, Salma Hesham, Diana Göhringer:
Towards a Modular RISC-V Based Many-Core Architecture for FPGA Accelerators. IEEE Access 8: 148812-148826 (2020)
2010 – 2019
- 2019
- [c6]Ahmed Kamaleldin, Muhammad Ali, Pedram Amini Rad, Marcus Gottschalk, Diana Göhringer:
Modular Memory System for RISC-V Based MPSoCs on Xilinx FPGAs. MCSoC 2019: 68-73 - 2018
- [c5]Khaled Khatib, Mostafa Ahmed, Ahmed Kamaleldin, Mohamed Abdelghany, Hassan Mostafa:
Dynamically reconfigurable power efficient security for Internet of Things devices. MOCAST 2018: 1-4 - [c4]Islam Ahmed, Ahmed Kamaleldin, Hassan Mostafa, Ahmed Nader Mohieldin:
Utilizing Dynamic Partial Reconfiguration to Reduce the Cost of FPGA Debugging. NEWCAS 2018: 205-208 - 2017
- [c3]Ahmed Kamaleldin, Ahmed M. Soliman, Ahmed Nagy, Youssef Gamal, Ahmed Shalash, Yehea Ismail, Hassan Mostafa:
Design guidelines for the high-speed dynamic partial reconfiguration based software defined radio implementations on Xilinx Zynq FPGA. ISCAS 2017: 1-4 - [c2]Ahmed Kamaleldin, Sherif Hosny, Khaled Mohamed, Mostafa Gamal, Abdelrhman Hussien, Eslam Elnader, Ahmed Shalash, Abdelfattah Mohammad Obeid, Yehea Ismail, Hassan Mostafa:
A reconfigurable hardware platform implementation for software defined radio using dynamic partial reconfiguration on Xilinx Zynq FPGA. MWSCAS 2017: 1540-1543 - [c1]Ahmed Kamaleldin, Islam Ahmed, Abdulfattah Mohammad Obeid, Ahmed Shalash, Yehea Ismail, Hassan Mostafa:
A Cost-Effective Dynamic Partial Reconfiguration Implementation Flow for Xilinx FPGA. NGCAS 2017: 281-284
Coauthor Index
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last updated on 2024-11-27 21:25 CET by the dblp team
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