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Chengjun Wu
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2020 – today
- 2024
- [j5]Yuxuan Du
, Junyi Qian
DSC-TRCP: Dynamically Self-Calibrating Tunable Replica Critical Paths Based Timing Monitoring for Variation Resilient Circuits. IEEE J. Solid State Circuits 59(7): 2286-2296 (2024) - [i2]Nicholas Roberts, Samuel Guo, Zhiqi Gao, Satya Sai Srinath Namburi, Sonia Cromp, Chengjun Wu, Chengyu Duan, Frederic Sala:
Pretrained Hybrids with MAD Skills. CoRR abs/2406.00894 (2024) - [i1]Chengrui Wang, Qingqing Long, Meng Xiao, Xunxin Cai, Chengjun Wu, Zhen Meng, Xuezhi Wang, Yuanchun Zhou:
BioRAG: A RAG-LLM Framework for Biological Question Reasoning. CoRR abs/2408.01107 (2024) - 2023
- [j4]Wei Zhang
Microarmature Solder Surface Detection: An Adaptive Central Region Sample Selection Anchor Free Framework. IEEE Trans. Instrum. Meas. 72: 1-11 (2023) - 2021
- [j3]Weiwei Shan
A 510-nW Wake-Up Keyword-Spotting Chip Using Serial-FFT-Based MFCC and Binarized Depthwise Separable CNN in 28-nm CMOS. IEEE J. Solid State Circuits 56(1): 151-164 (2021) - [c3]Ziyu Li, Weiwei Shan, Chengjun Wu, Haitao Ge, Jun Yang:
An Efficient and Reliable Negative Margin Timing Error Detection for Neural Network Accelerator without Accuracy Loss in 28nm CMOS. A-SSCC 2021: 1-3 - [c2]Yuqiang Cui, Chengjun Wu, Ziyu Li, Weiwei Shan:
Energy-Efficient Design of Large Fan-in Dynamic One-hot Multiplexer in 28nm CMOS Technology. ICTA 2021: 197-198 - 2020
- [j2]Xinchao Shang
A Wide-Voltage-Range Transition-Detector With In-Situ Timing-Error Detection and Correction Based on Pulsed-Latch Design in 28 nm CMOS. IEEE Trans. Circuits Syst. 67-I(11): 3933-3943 (2020)
2010 – 2019
- 2019
- [c1]Chengjun Wu, Weiwei Shan, Jiaming Xu:
ynamic Adaptation of Approximate Bit-width for CNNs based on Quantitative Error Resilience. NANOARCH 2019: 1-6 - 2015
- [j1]Chengjun Wu, Bin Luo, Hong Guo:
The impact of resource on remote quantum correlation Preparation. Quantum Inf. Comput. 15(13&14): 1223-1232 (2015)
Coauthor Index
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