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Spenser Gilliland
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2010 – 2019
- 2017
- [c11]Spenser Gilliland, Jafar Saniie, Fernando Martinez-Vallina:
Analysis of library functions for FPGA compute accelerators. EIT 2017: 394-397 - [c10]Spenser Gilliland:
Accelerating Applications at Cloud Scale using FPGAs. IWOCL 2017: 17:1 - 2016
- [j1]Spenser Gilliland, Pramod Govindan, Jafar Saniie:
Architecture of the reconfigurable ultrasonic system-on-chip hardware platform. IET Circuits Devices Syst. 10(4): 301-308 (2016) - [c9]Spenser Gilliland, Jafar Saniie, Fernando Martinez-Vallina:
Implementation of elementary functions for FPGA compute accelerators. EIT 2016: 179-182 - 2015
- [c8]Fernando Martinez-Vallina, Spenser Gilliland:
Performance optimization for a SHA-1 cryptographic workload expressed in OpenCL for FPGA execution. IWOCL 2015: 7:1 - 2014
- [c7]Clementine Boulet, Eric Rovira Ricard, Spenser Gilliland, Thomas Gonnot, Jafar Saniie:
Platform independent GUI for reconfigurable ultrasonic system-an-chip hardware. EIT 2014: 298-302 - [c6]Ehsan Monsef, Spenser Gilliland, Tricha Anjali, Jafar Saniie:
Remotely accessible computer network laboratory with hands-on experience. EIT 2014: 367-372 - 2013
- [c5]Pramod Govindan, Spenser Gilliland, Thomas Gonnot, Jafar Saniie:
HW/SW co-design for reconfigurable Ultrasonic System-on-Chip platform. EIT 2013: 1-4 - [c4]Pramod Govindan, Spenser Gilliland, Alireza Kasaeifard, Thomas Gonnot, Jafar Saniie:
Performance analysis of reconfigurable ultrasonic system-on-chip hardware platform. I2MTC 2013: 1550-1553 - [c3]Pramod Govindan, Thomas Gonnot, Spenser Gilliland, Jafar Saniie:
3D ultrasonic signal compression algorithms for high signal fidelity. MWSCAS 2013: 1263-1266 - [c2]Won-Jae Yi, Spenser Gilliland, Jafar Saniie:
Mobile ultrasonic signal processing system using Android smartphone. MWSCAS 2013: 1271-1274 - 2012
- [c1]Spenser Gilliland, Jafar Saniie, Semih Aslan:
Linux based reconfigurable platform for high speed ultrasonic imaging. MWSCAS 2012: 486-489
Coauthor Index
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