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Tetsuya Iida
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2010 – 2019
- 2012
- [j5]Min-Woong Seo, Sungho Suh, Tetsuya Iida, Taishi Takasawa, Keigo Isobe, Takashi Watanabe, Shinya Itoh, Keita Yasutomi, Shoji Kawahito:
A Low-Noise High Intrascene Dynamic Range CMOS Image Sensor With a 13 to 19b Variable-Resolution Column-Parallel Folding-Integration/Cyclic ADC. IEEE J. Solid State Circuits 47(1): 272-283 (2012) - [c6]Toshihisa Watabe, Kazuya Kitamura, Takehide Sawamoto, Tomohiko Kosugi, Tomoyuki Akahori, Tetsuya Iida, Keigo Isobe, Takashi Watanabe, Hiroshi Shimamoto, Hiroshi Ohtake, Satoshi Aoyama, Shoji Kawahito, Norifumi Egami:
A 33Mpixel 120fps CMOS image sensor using 12b column-parallel pipelined cyclic ADCs. ISSCC 2012: 388-390 - 2011
- [j4]Tetsuya Iida, Nobuo Matsubayashi
:
Strategic multi-store opening under financial constraint. Eur. J. Oper. Res. 210(2): 379-389 (2011) - [c5]Min-Woong Seo, Sungho Suh, Tetsuya Iida, Hiroshi Watanabe, Taishi Takasawa, Tomoyuki Akahori, Keigo Isobe, Takashi Watanabe, Shinya Itoh, Shoji Kawahito:
An 80μVrms-temporal-noise 82dB-dynamic-range CMOS Image Sensor with a 13-to-19b variable-resolution column-parallel folding-integration/cyclic ADC. ISSCC 2011: 400-402
2000 – 2009
- 2007
- [j3]Tetsuya Iida:
Special Section on Analog Circuits and Related SoC Integration Technologies. IEICE Trans. Electron. 90-C(6): 1141 (2007) - 2005
- [c4]Hirotomo Ishii, Ken Tanabe, Tetsuya Iida:
A 1.0 V 40mW 10b 100MS/s pipeline ADC in 90nm CMOS. CICC 2005: 395-398 - 2000
- [c3]Zdzislaw Czarnul, K. Oda, Tetsuya Iida:
A straightforward design of mismatch-shaped multi-bit ΔΣ D/A systems. ISCAS 2000: 717-720
1990 – 1999
- 1998
- [j2]Akira Yasuda, Hiroshi Tanimoto, Tetsuya Iida:
A third-order ΔΣ modulator using second-order noise-shaping dynamic element matching. IEEE J. Solid State Circuits 33(12): 1879-1886 (1998) - 1997
- [c2]Yasuhiro Sugimoto, Tetsuya Iida:
A current-mode, 3 V, 20 MHz, 9-bit equivalent CMOS sample-and-hold circuit. ASP-DAC 1997: 685-686 - 1996
- [j1]Tetsuro Itakura, Tetsuya Iida:
A feedforward technique with frequency-dependent current mirrors for a low-voltage wideband amplifier. IEEE J. Solid State Circuits 31(6): 847-849 (1996) - 1994
- [c1]Zdzislaw Czarnul, Shigetaka Takagi, Nobuo Fujii, Tetsuya Iida, Takeshi Yanagisawa:
Principles of nonlinearity Cancellation in Linear MOS Systems using MRC Circuits. ISCAS 1994: 217-220
Coauthor Index
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