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2020 – today
- 2024
- [j25]Tianxiang Qu
, Peizhuo Wang, Liangbo Lei
A 136-GΩ Input-Impedance Active Electrode for Non-Contact Biopotential Signals Monitoring. IEEE J. Solid State Circuits 59(2): 364-374 (2024) - [j24]Tao Wang
A Fully Integrated Digital Polar Transmitter With Single-Ended Doherty PA and DLL-Based Three-Segment Hybrid DTC in 28 nm CMOS. IEEE J. Solid State Circuits 59(2): 388-399 (2024) - [j23]Cong Tao
A Low-Power, Compact, 0.1-5.5-GHz, 40-dBm IB OIP3 LNTA-First Receiver for SDR. IEEE J. Solid State Circuits 59(9): 2761-2773 (2024) - [j22]Lairong Fang
A 107.6 dB-DR Three-Step Incremental ADC for Motion-Tolerate Biopotential Signals Recording. IEEE Trans. Biomed. Circuits Syst. 18(1): 111-122 (2024) - [j21]Yuying Li, Yijie Li
An 800MΩ-Input-Impedance 95.3dB-DR Δ-ΔΣ AFE for Dry-Electrode Wearable EEG Recording. IEEE Trans. Biomed. Circuits Syst. 18(5): 1079-1088 (2024) - [j20]Cong Tao
A Compact 0.1-1.95 GHz, 1.5 dB NF LNTA Based on Cascode Inverters. IEEE Trans. Circuits Syst. II Express Briefs 71(2): 597-601 (2024) - [j19]Liheng Liu
A 2.2μW PWM-Based Time-Domain Sensor Interface With 540mVpp Input Signal Range, 81.6dB SNDR and 80MΩ Input Impedance. IEEE Trans. Circuits Syst. II Express Briefs 71(4): 1904-1908 (2024) - [j18]Qixuan Wu
A 114.5-dB DR, 184.6-dB FoMDR Discrete-Time Self-Zoom ADC. IEEE Trans. Circuits Syst. II Express Briefs 71(9): 4076-4080 (2024) - [c94]Hanyu Shi, Mingchao Liang, Jie Zhu, Zhuang Zhang, Peng Cao, Jiawei Xu, Zhiliang Hong:
A 2.4-to-240W, 95.04% Peak Efficiency LLC Isolate Converter Controller with Symmetric Pulse-Width Balancing and Fixed-Period Hysteresis Burst Control. CICC 2024: 1-2 - [c93]Chang Yao, Zhen Lu, Liheng Liu, Yaohua Pan, Wenhui Qin, Shaoyu Ma, Yun Sheng, Zhiliang Hong, Jiawei Xu:
A 44μW 140dB-DR Hybrid Light-to-Digital Converter with Current-Tracking Dynamic Zoom and Power-Scaling OTA. CICC 2024: 1-2 - [c92]Jianhong Zhou, Yijie Li
A 103.6dB-SNDR 760mVPP-Input-Range 7.8GΩ-Input-Impedance Direct-Digitization Sensor Readout with Pseudo-Differential Transconductors and Dummy DAC. CICC 2024: 1-2 - [c91]Kaiwen Zhou, Jianhong Zhou, Yuxiang Tang, Jiahua Li, Zhiliang Hong, Jiawei Xu:
21.2 A 0.81mA, -105.2dB THD+N Class-D Audio Amplifier with Capacitive Feedforward and PWM-Aliasing Reduction for Wide-Band-Effective Linearity Improvement. ISSCC 2024: 380-382 - [c90]Yajie Zhang
Mixed Prototype Correction for Causal Inference in Medical Image Classification. ACM Multimedia 2024: 4377-4386 - [c89]Chao Chen, Zhu Yuan, Peng Cao, Jiawei Xu, Zhiliang Hong:
A 71.5-dB SNDR 475-MS/s Ringamp-Based Pipelined SAR ADC with On-Chip Bit-Weight Calibration. VLSI Technology and Circuits 2024: 1-2 - [c88]Qinjing Pan, Qi Luo, Tianxiang Qu, Liheng Liu, Xiao Li, Min Chen, Zhiliang Hong, Jiawei Xu:
A 97.3dB SNR Bioimpedance AFE with -84dB THD Segmented-ΔΣM Sinusoidal Current Generator and Passing-Through Instrumentation Amplifier. VLSI Technology and Circuits 2024: 1-2 - 2023
- [j17]Cong Tao
A 29.5 dBm OOB IIP3 TIA Based on a Two-Stage Pseudo-Differential OTA With R-C Compensation and Cascode Negative Resistance. IEEE Access 11: 24343-24352 (2023) - [j16]Tianxiang Qu
A 1.8-GΩ Input-Impedance 0.15-μV Input-Referred-Ripple Chopper Amplifier With Local Positive Feedback and SAR-Assisted Ripple Reduction. IEEE J. Solid State Circuits 58(3): 796-805 (2023) - [j15]Qinjing Pan, Tianxiang Qu
A 0.5-mΩ/√Hz Dry-Electrode Bioimpedance Interface With Current Mismatch Cancellation and Input Impedance of 100 MΩ at 50 kHz. IEEE J. Solid State Circuits 58(6): 1735-1745 (2023) - [j14]Peng Xu
A 0.15-μs/V Buck-Boost Symbol-Power-Tracking Supply Modulator With Dual Auxiliary Current Paths and EPP Scheme for 5G NR Power Amplifiers. IEEE Trans. Circuits Syst. I Regul. Pap. 70(11): 4660-4670 (2023) - [j13]Hengyao Zhao
A Tuning Range Extension Technique for Waveform-Shaping Single-Core CMOS Oscillators With No Dedicated Harmonic Tuning. IEEE Trans. Circuits Syst. II Express Briefs 70(4): 1306-1310 (2023) - [c87]Xiaohan Zhang, Tao Wang, Lingyun Shi, Di Hua, Zhiliang Hong:
A 7W, 2.5-5GHz Wideband GaN PA with Transformer-Based Matching Network. ASICON 2023: 1-4 - [c86]Chaoyang Zheng, Zhipeng Chen, Jianhua Lu, Yan Ma, Yumei Huang, Zhiliang Hong:
A 400M-510MHz On-Chip Transformer-Based RF Power Amplifier with 22.5dBm Output Power and 48% PAE. ASICON 2023: 1-4 - [c85]Peng Xu, Xueli Zhang, Tao Wang, Peng Cao, Jiawei Xu, Zhiliang Hong:
A 200MHz Bandwidth 84% Peak Efficiency AC-Coupled Envelope Tracking Supply Modulator with 10MHz Constant Switching Frequency. A-SSCC 2023: 1-3 - [c84]Tianxiang Qu
A 7.5GΩ-Input-Impedance 109dB-Total-CMRR and 80VPP-CMI-Tolerance Instrumentation Amplifier for Dry-Contact Two-Electrode ECG Monitoring. BioCAS 2023: 1-4 - [c83]Yijie Li
A 15.5b-ENOB 335mVpp-Linear-Input-Range 4.7GΩ-Input-Impedance Direct-ADC Based Analog Front-End. CICC 2023: 1-2 - [c82]Tian Dong, Tianxiang Qu
A 3.5MHz-BW 128nTrms Resolution TMR Readout Using Ping-Pong Auto-Zeroing and SAR-Assisted Offset Calibration for Contactless Current Sensing. ESSCIRC 2023: 1-4 - [c81]Yuying Li, Yijie Li
A 11GΩ-Input-Impedance 700mVpp-Input-Signal- Range 87dB-SNDR Direct-Digitization AFE for Wearable EEG Recording. ESSCIRC 2023: 1-4 - [c80]Hongyu Tian, Tianxiang Qu
A 1.9μVrms 7.7ppm/°C ADC Reference with 20mA Output Current and Single-Trim Inaccuracy of ±0.03%(3σ) from -40°C to 125°C. ESSCIRC 2023: 93-96 - [c79]Chao Yuan, Yuying Li, Hao Li, Yijie Li
A 49nV/√Hz 87.8dB-SNDR 4-Channel Digital Active Electrode System for Gel-Free and Motion-Tolerant Wearable EEG Acquisition. ESSCIRC 2023: 353-356 - [c78]Yijie Li
A 2MHz-BW 96.8dB-SNDR 98dB-SNR CT-Zoom ADC With Residue Feedforward, Redundancy and Fully LMS-Based Calibration. ESSCIRC 2023: 397-400 - [c77]Cong Tao, Liangbo Lei, Zhiliang Hong, Yumei Huang:
A 50-MHz Bandwidth and 50.6-dBm OOB-IIP3 Transimpedance Amplifier Based on a Three-Stage Pseudo-Differential OTA. ISCAS 2023: 1-4 - 2022
- [c76]Liheng Liu, Tianxiang Qu
A 0.8V/0.6V 2.2μW Time-Domain Analog Front-End with $540\text{mV}_{\text{pp}}$ Input Range, 81.6dB SNDR and $80\mathrm{M}\Omega$ Input Impedance. CICC 2022: 1-2 - [c75]Tianxiang Qu
A 1.8GΩ-Input-Impedance 0.15µV-Input-Referred-Ripple Chopper Amplifier with Local Positive Feedback and SAR-Assisted Ripple Reduction. CICC 2022: 1-2 - [c74]Peng Cao
A 91.6% Peak Efficiency Time-Domain-Controlled Single-Inductor Triple-Output Step-Up Converter with ±7.5 to ±12V Bipolar Output Voltages. ESSCIRC 2022: 277-280 - [c73]Peizhuo Wang, Tianxiang Qu
A 136GΩ-Input-Impedance Active Electrode for Non-Contact ECG Using Auto-Calibrated Positive Feedback and Capacitance Scaling in Femtofarad Resolution. ESSCIRC 2022: 433-436 - [c72]Liangbo Lei, Cong Tao, Zhipeng Chen, Zhiliang Hong, Yumei Huang:
A 5.4-mW 50-MHz 29.3-dBm-IIP3 Fourth-Order Low-Pass Filter. ESSCIRC 2022: 477-480 - [c71]Lairong Fang
A 130μW Three-Step DT Incremental Δ ∑ ADC Achieving 107.6dB DR and 99.3dB SNDR with Zoom and Extended-Range Counting. ESSCIRC 2022: 554-557 - [c70]Zhuang Zhang, Hanyu Shi, Danzhu Lu, Peng Cao, Zhiliang Hong:
An AOT Buck Converter with Adaptive TON Extender Achieving 2.5µs Settling Time in 4A Load Transient. ICTA 2022: 176-177 - [c69]Cong Tao, Liangbo Lei, Zhiliang Hong, Yumei Huang:
Wide-Band Inductorless and Capacitorless LNTA Based on Cascode Inverters. ISCAS 2022: 3073-3076 - [c68]Qinjing Pan, Tianxiang Qu
A 0.5mΩ/√Hz 106dB SNR 0.45cm2 Dry-Electrode Bioimpedance Interface with Current Mismatch Cancellation and Boosted Input Impedance of 100MΩ at 50kHz. ISSCC 2022: 332-334 - [c67]Cong Tao, Liangbo Lei, Zhipeng Chen, Zhiliang Hong, Yumei Huang:
A 50MHz Bandwidth TIA Based on Two Stage Pseudo-Differential OTA with Cascode Negative Resistance and R-C Compensation Technique. MWSCAS 2022: 1-4 - 2021
- [c66]Zhen Lu, Ting Yi, Zhiliang Hong:
A Review of PPG/NIRS Acquisition ASIC and System. ASICON 2021: 1-4 - [c65]Cong Tao, Liangbo Lei, Jiangli Huang, Zhipeng Chen, Yumei Huang, Zhiliang Hong:
New Linearization Implementations Improving IIP3 of Wideband LNTA by More than 14dB. ASICON 2021: 1-4 - [c64]Peizhuo Wang, Ting Yi, Zhiliang Hong:
High-Input-Impedance Amplifiers Design for Dry-Electrode Biopotential Acquisition: A Review. ASICON 2021: 1-4 - [c63]Tingting Wei, Qiong Wang, Zhu Yuan, Zhiliang Hong:
A Low Power Real-Time DC Removal Circuit for PPG Readout. ASICON 2021: 1-3 - [c62]Ruijie Yan, Lihan Cui, Zhiliang Hong:
A Fourth Order Chebyshev Complex Band-pass Filter Design with Filter Solution. ASICON 2021: 1-4 - [c61]Chao Yuan, Ting Yi, Zhiliang Hong:
High Precision AFE Design Methodology for Wearable EEG Acquisition. ASICON 2021: 1-4 - [c60]Weiqi Zhi, Ting Yi, Zhiliang Hong:
A Review and Perspective on Electrode Patch-Based Fetal ECG Monitoring ASIC. ASICON 2021: 1-4 - [c59]Peng Xu, Xueli Zhang, Peng Cao, Tingting Wei, Zhiguo Tong
A 2.7W AC-coupled hybrid supply modulator achieving 200MHz envelope-tracking bandwidth for 5G new radio power amplifier. A-SSCC 2021: 1-3 - [c58]Peng Cao
A Bipolar-Input Bipolar-Output DC-DC Converter for Thermoelectric Energy Harvesting. ISCAS 2021: 1-4 - [c57]Liangbo Lei, Cong Tao, Zhiliang Hong, Yumei Huang:
A 5.7mW +30dBm IIP3, Tunable Active-RC LPF in 40nm CMOS. ISCAS 2021: 1-4 - [c56]Zhiguo Tong
A Charge-Pump-Based SIMO Buck-Boost DC-DC Converter with Three Operation Modes. ISCAS 2021: 1-4 - 2020
- [c55]Jiawei Xu, Zhiliang Hong:
A 2-Electrode ECG Amplifier with 0.5% Nominal Gain Shift and 0.13% THD in a 530mVpp Input Common-Mode Range. A-SSCC 2020: 1-4
2010 – 2019
- 2019
- [j12]Peng Cao
A Bipolar-Input Thermoelectric Energy-Harvesting Interface With Boost/Flyback Hybrid Converter and On-Chip Cold Starter. IEEE J. Solid State Circuits 54(12): 3362-3374 (2019) - [j11]Pan Xue
A 2-D Predistortion Based on Profile Inversion for Fully Digital Cartesian Transmitter. IEEE Trans. Very Large Scale Integr. Syst. 27(1): 47-56 (2019) - [c54]Hejia Cai, Yan Hu, Zhiliang Hong:
A35.2 dBm CMOS RF Power Amplifier Using an 8-Way Current-Voltage Combining Transformer with Harmonic Control. ASICON 2019: 1-4 - [c53]Mingfeng Chen, Fuqiang Liu, Heng Ma, Zhiliang Hong:
High-Bandwidth Wide-Output-Swing Linear Amplifier for LTE-100MHz Envelope Tracking. ASICON 2019: 1-4 - [c52]Yan Hu, Tao Wang, Zhiliang Hong:
The Digital Front End with Dual-box Digital Pre-distortion in All-digital Quadrature Transmitter. ASICON 2019: 1-4 - [c51]Jieyang Li, Ting Yi, Zhiliang Hong:
A wide range and high resolution two-step TDC for millimeter-wave band ADPLL. ASICON 2019: 1-4 - [c50]Fuqiang Liu, Mingfeng Chen, Heng Ma, Zhiliang Hong:
Dual-Loop-Controlled AC-Coupling 100MHz Bandwidth Envelope Tracking Modulator for 5G RF Power Amplifier. ASICON 2019: 1-4 - [c49]Dehong Lv, Heng Ma, Fuqiang Liu, Zhiliang Hong:
A curvature corrected bandgap reference with mismatch cancelling and noise reduction. ASICON 2019: 1-4 - [c48]Tao Wang, Hejia Cai, Yan Hu, Pan Xue, Zhiliang Hong:
A Compact Quadrature Doherty Digital Power Amplifier with Backoff Efficiency Enhancement. ASICON 2019: 1-3 - [c47]Peng Cao
An 84% Peak Efficiency Bipolar-Input Boost/Flyback Hybrid Converter With MPPT and on-Chip Cold Starter for Thermoelectric Energy Harvesting. ISSCC 2019: 420-422 - 2018
- [j10]Wenlong Lyu
An Efficient Bayesian Optimization Approach for Automated Optimization of Analog Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(6): 1954-1967 (2018) - [j9]Yao Qian
An On-Chip Transformer-Based Self-Startup Hybrid SIDITO Converter for Thermoelectric Energy Harvesting. IEEE Trans. Circuits Syst. II Express Briefs 65-II(11): 1673-1677 (2018) - [c46]Jianguo Yang, Xing Li, Tao Wang, Xiaoyong Xue, Zhiliang Hong, Yuanyuan Wang, David Wei Zhang, Hongliang Lu:
A Physically Unclonable Function with BER < 0.35% for Secure Chip Authentication Using Write Speed Variation of RRAM. ESSDERC 2018: 54-57 - [c45]Pan Xue, Haijun Shao, Dan Fang, Gan Guo, Wei Che, Zhiliang Hong:
A Digital ΣΔ Modulated Class-S Transmitter with Two-Step Up-conversion and Filter-less Front End. ISOCC 2018: 27-28 - [c44]Yuan Gao, Zhiliang Hong, Axel Thomsen:
Session 8 overview: Wireless power and harvesting: Power management subcommittee. ISSCC 2018: 134-135 - 2017
- [j8]Han Jin, Yajie Qin
A Mobile-Based High Sensitivity On-Field Organophosphorus Compounds Detecting System for IoT-Based Food Safety Tracking. J. Sensors 2017: 8797435:1-8797435:13 (2017) - [j7]Yao Qian, Hongguang Zhang, Yanqin Chen, Yajie Qin, Danzhu Lu, Zhiliang Hong:
A SIDIDO DC-DC Converter With Dual-Mode and Programmable-Capacitor-Array MPPT Control for Thermoelectric Energy Harvesting. IEEE Trans. Circuits Syst. II Express Briefs 64-II(8): 952-956 (2017) - [c43]Haijun Shao, Dan Fan, Pan Xue, Hongguang Zhang, Yilei Shen, Yumei Huang, Gan Guo, Zhiliang Hong:
A LTE digital mixer with 25% duty quadrature 4-phase clocks. ASICON 2017: 104-107 - [c42]Xiaofei Hu, Xiao Ge, Ting Yi, Danzhu Lu, Zhiliang Hong:
A 1.2V output RF energy harvester with a harvesting-efficiency tracking circuit. ASICON 2017: 830-834 - [c41]Chenyang Wang, Yilei Shen, Pan Xue, Zhiliang Hong:
The implement of digital front end in all-digital quadrature RF transmitter. ASICON 2017: 900-903 - [c40]Xiao Ge, Xiaofei Hu, Yajie Qin, Zhiliang Hong:
A single inductor tri-input dual-output buck-boost DC-DC converter with MPPT for multi-source energy harvesting. ASICON 2017: 940-943 - [c39]Hongguang Zhang, Pan Xue, Zhiliang Hong:
A 4.6-5.6 GHz constant KVCO low phase noise LC-VCO and an optimized automatic frequency calibrator applied in PLL frequency synthesizer. IECON 2017: 8337-8342 - [e1]Yajie Qin, Zhiliang Hong, Ting-Ao Tang:
12th IEEE International Conference on ASIC, ASICON 2017, Guiyang, China, October 25-28, 2017. IEEE 2017, ISBN 978-1-5090-6625-4 [contents] - 2016
- [j6]Yang Zhao
An All-Digital Gigahertz Class-S Transmitter in a 65-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 24(4): 1402-1411 (2016) - 2015
- [c38]Yanqin Chen, Hongguang Zhang, Xu Guo, Zhiliang Hong:
A 400mV supply voltage self-start clock generator for energy harvest system. ASICON 2015: 1-3 - [c37]Shuo Li, Nan Qi, Vahid Behravan, Zhiliang Hong, Patrick Yin Chiang:
A 20 μW dual-channel analog front-end in 65nm CMOS for portable ECG monitoring system. ASICON 2015: 1-4 - [c36]Pan Xue, Yilei Shen, Yang Zhao, Zhiliang Hong:
An all-digital quadrature RF transmitter with 8-bit ΣΔ modulation. ASICON 2015: 1-4 - [c35]Feng Ye, Haijun Wang, Ting Yi, Zhiliang Hong:
A 14-bit 2-GS/s DAC with a programmable interpolation filter. ASICON 2015: 1-4 - 2014
- [c34]Rongtao Hu, Yajie Qin, Yinghong Tian, Zhiliang Hong, Geng Yang, Li-Rong Zheng, Jie Jia, Cuiwei Yang, Xiaomei Wu, Yuanyuan Wang:
Biofeedback neuromuscular electrical stimulation front-end for dysphagia treatment. BioCAS 2014: 612-615 - [c33]Danzhu Lu, Yao Qian, Zhiliang Hong:
4.3 An 87%-peak-efficiency DVS-capable single-inductor 4-output DC-DC buck converter with ripple-based adaptive off-time control. ISSCC 2014: 82-83 - 2013
- [j5]Shanshan Dai, Xiaofei Cao, Ting Yi, Allyn E. Hubbard, Zhiliang Hong:
1-V Low-Power Programmable Rail-to-Rail Operational Amplifier With Improved Transconductance Feedback Technique. IEEE Trans. Very Large Scale Integr. Syst. 21(10): 1928-1935 (2013) - [c32]Qiuli Li, Yao Qian, Danzhu Lu, Zhiliang Hong:
VCCS controlled LDO with small on-chip capacitor. ASICON 2013: 1-4 - [c31]Yang Zhao
Design of a time-interleaved band-pass ΣΔ modulator for Class-S power amplifier. ASICON 2013: 1-4 - [c30]Lei Wan, Yajie Qin, Patrick Chiang, Guoping Chen, Ran Liu, Zhiliang Hong:
High-sensitivity photodetection sensor front-end, detecting organophosphourous compounds for food safety. CICC 2013: 1-4 - [c29]Jing Li, Ruiyuan Zhu, Ting Yi, Bill Liu, Zhiliang Hong:
An energy-efficient 5-MHz to 20-MHz, 12-bit reconfigurable continuous-time ΣΔ modulator for 4G-LTE application. ISLPED 2013: 163-168 - 2012
- [j4]Yi Zhao, Shenjie Wang, Zhiliang Hong:
A sub-sampling 4.25 GS/s 3-bit flash ADC with asymmetric spatial filter response. Microelectron. J. 43(6): 337-344 (2012) - [c28]Jiao Cheng, Lingli Xia, Chao Ma, Yong Lian
A near-threshold, multi-node, wireless body area sensor network powered by RF energy harvesting. CICC 2012: 1-4 - [c27]Danzhu Lu, Jiale Yu, Zhiliang Hong, Jingwen Mao, Hui Zhao, Eric Cirot:
A 10MHz ripple-based on-time controlled buck converter with dual ripple compensation and real-time efficiency optimization. ESSCIRC 2012: 333-336 - [c26]Chen Jiang, Junren Liu, Yumei Huang, Zhiliang Hong:
A low-noise, 8.95-11GHz all-digital frequency synthesizer with a metastability-free time-to-digital converter and a sleepy counter in 65nm CMOS. ESSCIRC 2012: 365-368 - 2011
- [j3]Lingli Xia, Hu Chen, Yumei Huang, Zhiliang Hong, Patrick Yin Chiang:
100-phase, dual-loop delay-locked loop for impulse radio ultra-wideband coherent receiver synchronisation. IET Circuits Devices Syst. 5(6): 484-493 (2011) - [c25]Jing Li, Ran Li, Ting Yi, Zhiliang Hong, Bill Yang Liu:
VLSI implementation of high-speed low power decimation filter for LTE sigma-delta A/D converter application. ASICON 2011: 453-456 - [c24]Ran Li, Qi Zhao, Ting Yi, Zhiliang Hong:
A 14-bit 2-GS/s DAC with SFDR>70dB up to 1-GHz in 65-nm CMOS. ASICON 2011: 500-503 - [c23]Yi Zhao, Jun Jiang, Ke Shao, Yajie Qin, Zhiliang Hong:
A low-power 4.224GS/s sampler in 0.13-µm CMOS for IR UWB receiver. ASICON 2011: 512-515 - [c22]Song Hu, Weinan Li, Yumei Huang, Zhiliang Hong:
Design of a low-power low-phase-noise multi-mode divider with 25%-duty-cycle outputs in 0.13µm CMOS. ASICON 2011: 594-597 - [c21]Chunchen Gu, Yi Zhao, Zhiliang Hong:
A 4GS/s 3b two-way time-interleaved ADC in 0.13um CMOS. ASICON 2011: 1002-1005 - [c20]Xingli Huang, Xi Qin, Yajie Qin, Hao Fang, Zhiliang Hong:
A 0.8-3GHz 40dB dynamic range CMOS variable-gain amplifier. ASICON 2011: 1030-1033 - [c19]Renzhong Xie, Chen Jiang, Weinan Li, Yumei Huang, Zhiliang Hong:
A dual-mode analog baseband utilizing digital-assisted calibration for WCDMA/GSM receivers. ASICON 2011: 1058-1061 - [c18]Chen Jiang, Renzhong Xie, Weinan Li, Yumei Huang, Zhiliang Hong:
Reconfigurable low pass filter with Automatic Frequency Tuning for WCDMA and GSM application. ASICON 2011: 1066-1069 - [c17]Song Hu, Weinan Li, Yumei Huang, Zhiliang Hong:
Design of a high-linearity RF front-end with IP2 calibration for SAW-less WCDMA receivers. ASICON 2011: 1090-1093 - [c16]Dong Qiu, Ting Yi, Zhiliang Hong:
A low-power triple-mode sigma-delta DAC for reconfigurable (WCDMA/TD-SCDMA/GSM) transmitters. ASP-DAC 2011: 119-120 - [c15]Nan Lin, Fei Fang, Zhiliang Hong, Hao Fang:
A CMOS broadband precise programmable gain amplifier with bandwidth extension technique. A-SSCC 2011: 225-228 - [c14]Xiaohan Gong, Jinhua Ni, Zhiliang Hong, Bill Liu:
An 80% peak efficiency, 0.84mW sleep power consumption, fully-integrated DC-DC converter with buck/LDO mode control. CICC 2011: 1-4 - [c13]Zhenfei Peng, Shanshan Yang, Yong Feng, Zhiliang Hong, Bill Liu:
An 80% peak efficiency, 410mW, single supply rail powered Class-I linear audio amplifier. CICC 2011: 1-4 - [c12]Weiwei Xu, Ye Li, Zhiliang Hong, Dirk Killat, Horst Schleifer:
A single-inductor multiple-bipolar-output (SIMBO) converter with fully-adaptive feedback matrix and improved light-load ripple. ESSCIRC 2011: 435-438 - [c11]Lin Cheng
A constant off-time controlled boost converter with adaptive current sensing technique. ESSCIRC 2011: 443-446 - [c10]Weiwei Xu, Ye Li, Zhiliang Hong, Dirk Killat:
A 90% peak efficiency single-inductor dual-output buck-boost converter with extended-PWM control. ISSCC 2011: 394-396 - 2010
- [c9]Wen-Hui Fu, Jun Jiang, Xi Qin, Ting Yi, Zhiliang Hong:
A Reconfigurable Analog Processor Based on FPAA with Coarse-Grained, Heterogeneous Configurable Analog Blocks. FPL 2010: 211-216 - [c8]Weiyang Xu, Zhiliang Hong:
Blind CFO Estimation for Constant Modulus Signaling Based OFDM Systems. ICC 2010: 1-5 - [c7]Shenjie Wang, Zhiliang Hong:
Design of 4-bit parallel sub-sampling A/D converter for IR-UWB receiver. ICECS 2010: 1049-1052
2000 – 2009
- 2009
- [c6]Weiwei Xu, Ye Li, Xiaohan Gong, Zhiliang Hong, Dirk Killat:
A single-inductor dual-output switching converter with low ripples and improved cross regulation. CICC 2009: 303-306 - [c5]Jinhua Ni, Zhiliang Hong, Bill Yang Liu:
Improved on-chip components for integrated DC-DC converters in 0.13 µm CMOS. ESSCIRC 2009: 448-451 - 2008
- [c4]Lingli Xia, Weinan Li, Yumei Huang, Zhiliang Hong:
A 3-5GHz amplitude and spectrum tunable impulse radio UWB transmitter. APCCAS 2008: 160-163 - [c3]Weinan Li, Lingli Xia, Yumei Huang, Zhiliang Hong:
A 0.13μm CMOS UWB receiver front-end using passive mixer. APCCAS 2008: 288-291 - [c2]Feng Zhao, Xiaoping Gao, Huajiang Zhang, Kangmin Hu, Zhiliang Hong:
A CMOS 434/868 MHz FSK/OOK transmitter with integrated fractional-N PLL. APCCAS 2008: 546-549 - [c1]Weiwei Xu, Xiaoting Zhu, Zhiliang Hong, Dirk Killat:
Design of single-inductor dual-output switching converters with average current mode control. APCCAS 2008: 902-905 - 2004
- [j2]Quanping Huang, Rongzheng Zhou, Zhiliang Hong:
Low memory and low complexity VLSI implementation of JPEG2000 codec. IEEE Trans. Consumer Electron. 50(2): 638-646 (2004) - 2003
- [j1]Jie He, Rongzheng Zhou, Zhiliang Hong:
Modified fast climbing search auto-focus algorithm with adaptive step size searching technique for digital camera. IEEE Trans. Consumer Electron. 49(2): 257-262 (2003)
Coauthor Index
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last updated on 2024-11-07 21:37 CET by the dblp team
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