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Yichen Yang 0002
Person information
- affiliation: Xi'an Jiaotong University, School of Microelectronics, China
Other persons with the same name
- Yichen Yang 0001 — Zhejiang University, Hangzhou, China
- Yichen Yang 0003 — China University of Petroleum, College of Science, Qingdao, China
- Yichen Yang 0004 — Tianjin Medical University, School of Biomedical Engineering, China
- Yichen Yang 0005 — University of Michigan, Ann Arbor, MI, USA
- Yichen Yang 0006 — Nanjing University of Information Science and Technology, Yale-NUIST Center on Atmospheric Environment, China (and 1 more)
- Yichen Yang 0007 — East China University of Science and Technology, Department of Mathematics, Shanghai, China
- Yichen Yang 0008 — MIT CSAIL, Cambridge, MA, USA
- Yichen Yang 0009 — Huazhong University of Science and Technology, School of Computer Science and Technology, Wuhan, China
- Yichen Yang 0010 — Northwestern Polytechnical University, Xi'an, China
- Yichen Yang 0011 — Dalian Jiaotong University, School of Electrical and Information Engineering, China
- Yichen Yang 0012 — Sanda University, Department of Information Science and Technology, China
- Yichen Yang 0013 — Peking University, School of Mathematical Sciences, Beijing, China
- Yichen Yang 0014 — Tongji University, Department of Information and Communication Engineering, Shanghai, China
- Yichen Yang 0015 — Chinese Academy of Sciences, Institute of Geographic Sciences and Natural Resources Research, Beijing, China
- Yichen Yang 0016 — Northeastern University at Qinhuangdao, School of Computer and Communication Engineering, China
- Yichen Yang 0017 — Wuhan Institute of Technology, China
- Yichen Yang 0018 — Wuxi Public Security Bureau Intelligence Command Center, China
- Yichen Yang 0019 — ShanghaiTech University, School of Information Science and Technology, China
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2010 – 2019
- 2018
- [c2]Feng Liang, Shaofei Yang, Tinrui Mai, Yichen Yang:
The Design of Objects Bounding Boxes Non-Maximum Suppression and Visualization Module Based on FPGA. DSP 2018: 1-5 - [c1]Feng Liang, Yichen Yang, Guohe Zhang, Xueliang Zhang, Bin Wu:
Design of 16-bit fixed-point CNN coprocessor based on FPGA. DSP 2018: 1-5
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last updated on 2024-12-02 22:33 CET by the dblp team
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