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IEEE Design & Test of Computers, Volume 3
Volume 3, Number 1, February 1986
- Rostam Joobbani, Daniel P. Siewiorek
:
WEAVER: A Knowledge-Based Routing Expert. 12-23 - Walter S. Scott, John K. Ousterhout:
Magic's Circuit Extractor. 24-34 - Andrzej J. Strojwas:
The CMU-CAM System. 35-44 - Hingsum S. Fung, Sanford S. Hirschhorn:
An Automatic DFT System for the Silc Silicon Compiler. 45-57 - Anshul Kumar, Anjali Arya, V. V. Swaminathan, Amit Misra:
Automatic Generation of Digital System Schematic Diagrams. 58-65 - Louis K. Scheffer, Ronny Soetarman:
Hierarchical Analysis of IC Artwork with User-Defined Rules. 66-74 - C. Durward Rogers:
The VIVID Symbolic Design System: Current Overview And Future Directions. 75-81 - Conrad Zagwyn:
New Products Test. 88-90 - J. Daniel Nash:
New Products Design. 91-92 - Robert E. Anderson:
Book Reviews. 95
Volume 3, Number 2, April 1986
- Allen Dewey, Anthony Gadient:
VHDL Motivation. 12-16 - James H. Aylor, Ronald Waxman, Charles Scarratt:
VHDL - Feature Description and Analysis. 17-27 - Roger Lipsett, Erich Marschner, Moe Shahdad:
VHDL - The Language. 28-41 - Alfred S. Gilman:
VHDL - The Designer Environment. 42-47 - Al Lowenstein, Greg Winter:
VHDL's Impact on Test. 48-53 - J. Daniel Nash, Larry F. Saunders:
VHDL Critique. 54-65 - William R. Simpson, Carol J. Dowling:
WRAPLE: The Weighted Repair Assistance Program Learning Extension. 66-73 - J. Daniel Nash:
New Products Design. 84 - Conrad Zagwyn:
New Products Test. 85
Volume 3, Number 3, June 1986
- Dave W. Palmer, John A. Wisniewski:
IC Design Capability Conversion from Mainframe to Workstation Environment. 18-24 - Mark A. Linton:
Benchmarking Engineering Workstations. 25-30 - Rolf-Dieter Fiebrich:
A Supercomputer Workstation for VLSI CAD. 31-37 - Akira Sugimoto:
VEGA: A Visual Modeling Language for Digital Systems. 38-45 - K. L. Kodandapani, Edward J. McGrath:
A Wirelist Compare Program for Verifying VLSI Layouts. 46-51 - Dilip K. Bhavsar:
A New Economical Implementation for Scannable Flip-Flops in MOS. 52-56 - J. Daniel Nash:
New Products Design. 65-67 - Conrad Zagwyn:
New Products Test. 68-69
Volume 3, Number 4, August 1986
- Thirumalai Sridhar:
A New Parallel Test Approach for Large Memories. 15-22 - Teruo Tamama, Norio Kuji:
Integrating an Electron-Beam System into VLSI Fault Diagnosis. 23-29 - Dennis Petrich:
Achieving Accurate Timing Measurements on TTL/CMOS Devices. 33-42 - Miron Abramovici, James J. Kulikowski, Premachandran R. Menon, David T. Miller:
SMART and FAST: Test Generation for VLSI Scan-Design Circuits. 43-54 - Jerry M. Soden, Charles F. Hawkins:
Test Considerations for Gate Oxide Shorts in CMOS ICs. 56-64 - J. Daniel Nash:
New Products Design. 72 - Conrad Zagwyn:
New Products Test. 73-75 - Robert E. Anderson:
Book Reviews. 76-77
Volume 3, Number 5, October 1986
- Kenneth P. Parker:
Testability: Barriers to Acceptance. 11-15 - Madhukar K. Reddy, Sudhakar M. Reddy:
Detecting FET Stuck-Open Faults in CMOS Latches and Flip-Flops. 17-26 - Sunil K. Jain, Charles E. Stroud:
Built-in Self Testing of Embedded Memories. 27-37 - E. Ted Grinthal:
Software Quality Assurance And CAD User Interfaces. 39-48 - David Hightower, Aart J. de Geus, Patrick Fasang, Robert Griffin, Gary Leive:
Computer-Aided-Design Research at the GE Microelectronics Center. 49-56
Volume 3, Number 6, December 1986
- Hugo De Man, Jan M. Rabaey, Paul Six, Luc J. M. Claesen:
Cathedral-II: A Silicon Compiler for Digital Signal Processing. 13-25 - Frans P. M. Beenker, Karel J. E. van Eerdewijk, Robert B. W. Gerritsen, Frank N. Peacock, Max van der Star:
Macro Testing: Unifying IC and Board Test. 26-32 - Joachim Mucha, Wilfried Daehn, Josef Gross:
Self-Test in a Standard Cell Environment. 35-41
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