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32nd SBAC-PAD 2020: Porto, Portugal
- 32nd IEEE International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2020, Porto, Portugal, September 9-11, 2020. IEEE 2020, ISBN 978-1-7281-9924-5
Conference Papers
Computer Architecture
- Francisco Mendes, Pedro Tomás
, Nuno Roma
Exploiting Non-conventional DVFS on GPUs: Application to Deep Learning. 1-9 - Nicolas Bohm Agostini
Design Space Exploration of Accelerators and End-to-End DNN Evaluation with TFLITE-SOC. 10-19 - Rico Amslinger, Christian Piatka, Florian Haas, Sebastian Weis, Theo Ungerer, Sebastian Altmeyer:
Hardware Multiversioning for Fail-Operational Multithreaded Applications. 20-27 - Syed Ali Hasnain, Rabi N. Mahapatra:
On-chip Parallel Photonic Reservoir Computing using Multiple Delay Lines. 28-34 - Douglas Pereira Pasqualin
Online Sharing-Aware Thread Mapping in Software Transactional Memory. 35-42 - Jorge González, Alexander Gazman, Maarten Hattink, Mauricio G. Palma
Optically Connected Memory for Disaggregated Data Centers. 43-50
Networking and Distributed Systems
- Vinu E. Venugopal
AIR: A Light-Weight Yet High-Performance Dataflow Engine based on Asynchronous Iterative Routing. 51-58 - Felipe Rodrigo de Souza, Marcos Dias de Assunção, Eddy Caron, Alexandre da Silva Veith
An Optimal Model for Optimizing the Placement and Parallelism of Data Stream Processing Applications on Cloud-Edge Computing. 59-66 - Anderson Andrei Da Silva, Clément Mommessin, Pierre Neyron, Denis Trystram, Adwait Bauskar, Adrien Lebre, Alexandre van Kempen, Yanik Ngoko, Yoann Ricordel:
Evaluating Computation and Data Placements in Edge Infrastructures through a Common Simulator. 67-74 - Adrien Gougeon, Benjamin Camus, Anne-Cécile Orgerie:
Optimizing Green Energy Consumption of Fog Computing Architectures. 75-82
Parallel Applications and Algorithms
- Ivan Fernandez, Ricardo Quislant
Energy-Efficient Time Series Analysis Using Transprecision Computing. 83-90 - Pablo San Juan, Adrián Castelló
High Performance and Portable Convolution Operators for Multicore Processors. 91-98 - Andrew Anderson, Aravind Vasudevan, Cormac Keane, David Gregg:
High-Performance Low-Memory Lowering: GEMM-based Algorithms for DNN Convolution. 99-106 - Christina L. Peterson, Amalee Wilson, Peter Pirkelbauer, Damian Dechev:
Optimized Transactional Data Structure Approach to Concurrency Control for In-Memory Databases. 107-115 - Changjiang Gou, Anne Benoit
Reliable and Energy-aware Mapping of Streaming Series-parallel Applications onto Hierarchical Platforms. 116-123 - Guilherme Andrade, George Teodoro, Renato Ferreira:
Scalable and Efficient Spatial-Aware Parallelization Strategies for Multimedia Retrieval. 124-131 - Pawel Zuk, Krzysztof Rzadca:
Scheduling Methods to Reduce Response Latency of Function as a Service. 132-140 - Hongyang Sun
Selective Protection for Sparse Iterative Solvers to Reduce the Resilience Overhead. 141-148 - Steven Wei Der Chien
sputniPIC: An Implicit Particle-in-Cell Code for Multi-GPU Systems. 149-156 - Samuel Thomas, Roxana Hayne, Jonad Pulaj, Hammurabi Mendes:
Using Skip Graphs for Increased NUMA Locality. 157-166
Performance Evaluation
- Martin Johnson, Daniel P. Playne:
A Fast and Concise Parallel Implementation of the 8x8 2D IDCT using Halide. 167-174 - David Quaresma, Daniel Fireman, Thiago Emmanuel Pereira:
Controlling Garbage Collection and Request Admission to Improve Performance of FaaS Applications. 175-182 - Ivy Bo Peng
On the Memory Underutilization: Exploring Disaggregated Memory on HPC Systems. 183-190 - Dorra Boughzala, Laurent Lefèvre, Anne-Cécile Orgerie:
Predicting the Energy Consumption of CUDA Kernels using SimGrid. 191-198 - Yuan Wen, Andrew Anderson, Valentin Radu
TASO: Time and Space Optimization for Memory-Constrained DNN Inference. 199-208 - Riccardo Mancini, Antonio Ritacco, Giacomo Lanciano
XPySom: High-Performance Self-Organizing Maps. 209-216
System Software
- Wei Liu, Hao Wu, Ziyue Jiang, Yifan Gong, Jiangming Jin:
A Robotic Communication Middleware Combining High Performance and High Reliability. 217-224 - Rafael A. Lopes, Samuel Thibault, Alba C. M. A. Melo
MASA-StarPU: Parallel Sequence Comparison with Multiple Scheduling Policies and Pruning. 225-232 - Marcus Karpoff, José Nelson Amaral, Kai-Ting Amy Wang, Rayson Ho, Brice Dobry:
PSU: A Framework for Dynamic Software Updates in Multi-threaded C-Language Programs. 233-240 - Ioannis Vardas
Towards Communication Profile, Topology and Node Failure Aware Process Placement. 241-248
WAMCA Workshop Papers
- Vitoria Pinho
OmpTracing: Easy Profiling of OpenMP Programs. 249-256 - Diana A. Barros, Cristiana Bentes:
Analyzing the Loop Scheduling Mechanisms on Julia Multithreading. 257-264 - Alexandre Azevedo, Cristiana Bentes, Maria Clicia Stelling de Castro, Claude Tadonki:
Performance Analysis and Optimization of the Vector-Kronecker Product Multiplication. 265-272 - Daniel Di Domenico, Gerson G. H. Cavalheiro:
JAMPI: A C++ Parallel Programming Interface Allowing the Implementation of Custom and Generic Scheduling Mechanisms. 273-280 - Christophe Cérin, Nicolas Grenèche, Tarek Menouer
Towards Pervasive Containerization of HPC Job Schedulers. 281-288 - Stefan Sydow
Towards Profile-Guided Optimization for Safe and Efficient Parallel Stream Processing in Rust. 289-296 - Xi Zhang, Xu Sun, Xiaohu Guo
Re-evaluation of Atomic Operations and Graph Coloring for Unstructured Finite Volume GPU Simulations. 297-304 - Rui Alves
Extending Heterogeneous Applications to Remote Co-processors with rOpenCL. 305-312 - Maron Schlemon, Jamin Naghmouchi:
FFT Optimizations and Performance Assessment Targeted towards Satellite and Airborne Radar Processing. 313-320 - Suyash Bakshi, S. Lennart Johnsson:
A Highly Efficient SGEMM Implementation using DMA on the Intel/Movidius Myriad-2. 321-328
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