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8th RSP 1997: Chapel Hill, North Carolina, USA
- Proceedings 8th IEEE International Workshop on Rapid System Prototyping: Shortening the Path from Specification to Prototype, June 24-26, 1997, Chapel Hill, North Carolina, USA. IEEE Computer Society 1997, ISBN 0-8186-8064-4
Virtual Prototyping and Emulation
- Mikko Kerttula, Marko Salmela, Marko Heikkinen:
Virtual reality prototyping-a framework for the development of electronics and telecommunication products. 2-11 - Christoph Weiler, Arno Kunzmann, Wolfgang Rosenstiel:
Performance analysis for a Java-based virtual prototype. 12-19 - Michele Borgatti, E. Cevenini, Roberto Rambaldi, Marco Felici, Alberto Ferrari, Roberto Guerrieri:
Fast board-level prototyping of a speech recognition system using virtual emulation. 20-25
Hardware/Software Codesign I
- Vincenza Carchiolo, Michele Malgeri, Giuseppe Mangioni:
An algorithm for direct synthesis of formal specifications. 28-38 - Laurent Freund, Denis Dupont, Michel Israël, Frédéric Rousseau:
Overview of the ECOS project. 39-43 - Paulo Romero Martins Maciel, Edna Barros, Wolfgang Rosenstiel:
Computing communication cost by Petri nets for hardware/software codesign. 44-56
Hardware/Software Codesign II
- Ken Hines, Gaetano Borriello:
Selective focus as a means of improving geographically distributed embedded system co-simulation. 58-62 - K. McCarley, Sarma B. K. Vrudhula:
Macro-instruction generation for dynamic logic caching. 63-69
Software Prototyping
- Chabong Choi, Soonhoi Ha:
Software synthesis for dynamic data flow graph. 72-79 - Stanley Y. W. Su, R. Chatterjee:
KBMS-based evolutionary prototyping of software systems. 80-90 - Fabrice Kordon, Jean-Luc Mounier:
FrameKit and the prototyping of CASE environments. 91-97
Synthesis o Digital and Image Processing Systems
- Luc De Coster, Rudy Lauwereins, J. A. Peperstraete:
Data routing in dataflow graphs. 100-106 - Eric K. Pauer:
Multiprocessor system development for high performance signal processing applications. 107-114
Simulation
- Thuyen Le, Frank-Michael Renner, Manfred Glesner:
Hardware in-the-loop simulation-a rapid prototyping approach for designing mechatronics systems. 116-121 - Avi Kumar, Brian Waldecker:
Use of queueing network and trace-driven simulation techniques in PowerPC processor and system performance trade-off studies. 122-127 - Charles Roth, Jon Tyler, Paul Jagodik, Huy Nguyen:
Divide and conquer approach to functional verification of PowerPC TM microprocessors. 128-133
Design Methods and Frameworks
- Andreas Kirschbaum, Manfred Glesner:
Rapid prototyping of communication architectures. 136-141 - James E. Hilger:
A process infrastructure for architecture analysis and embedded processor development to support a technology insertion process. 142-149 - L. Chaouat, S. Garin, Alain Vachoux, Daniel Mlynek:
Rapid prototyping of hardware systems via model reuse. 150-156 - E. Tsun, Sarma B. K. Vrudhula:
Rapid prototyping of networks of asynchronous multiple functional units. 157-166
Verification
- Nadeem Malik, Steven Roberts, Alan Pita, Ryan Dobson:
Automaton: an autonomous coverage-based multiprocessor system verification environment. 168-172 - Reza Sedaghat-Maman, Erich Barke:
A new approach to fault emulation. 173-179
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