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6th LASCAS 2015: Montevideo, Uruguay
- IEEE 6th Latin American Symposium on Circuits & Systems, LASCAS 2015, Montevideo, Uruguay, February 24-27, 2015. IEEE 2015, ISBN 978-1-4799-8332-2
- Paulo César Comassetto de Aguirre
, Hamilton Duarte Klimach, Altamiro Amadeu Susin:
A third-order 1 MHz continuous-time sigma-delta modulator in a 130 nm CMOS process. 1-4 - Alejandro L. Veiga
Hardware implementation of a single-cycle one-dimensional median filter. 1-4 - Miguel Yucra, Fabiano Schmidt
A comparative analysis of inclusion of PMUs in the power system state estimator. 1-4 - David Cordova, Eric E. Fabris, Sergio Bampi
A CMOS low noise transconductance amplifier for 1-6 GHz bands. 1-4 - Luis Contreras, Sérgio Cruz, José Maurício S. T. Motta
Hardware Architecture of the EKF Prediction Stage applied to mobile robot localization. 1-4 - Felipe A. P. de Figueiredo, Fabiano S. Mathilde, Fabrício L. Figueiredo, Fabbryccio A. C. M. Cardoso
An FPGA-based time-domain frequency shifter with application to LTE and LTE-A systems. 1-4 - Rayyan Manwar, Livingstone Arjunan, Majid Ahmadi, Sazzadur Chowdhury:
Resonant frequency calculation of square diaphragms: A comparison. 1-4 - Luis E. Anza, Enrique D. Ferreira
Design and construction of a prototype system for gait analysis for research in subjects with balance problems. 1-4 - Isis D. Bender, Guilherme Schwanke Cardoso, Arthur C. de Oliveira, Lucas C. Severo
Testing fully differential amplifiers using common mode feedback circuit: A case study. 1-4 - Carlos Salazar-Garcia
Digital integrated circuit implementation of an identification stage for the detection of illegal hunting and logging. 1-4 - Fabian Olivera
A computer-aided approach for voltage reference circuit design. 1-4 - Luis F. Grisales, Alejandro Grajales, Oscar D. Montoya
Optimal location and sizing of Distributed Generators using a hybrid methodology and considering different technologies. 1-4 - Edson Leonardo dos Santos
Multimode 2.4 GHz CMOS power amplifier with gain control for efficiency enhancement at power backoff. 1-4 - Pablo Perez-Nicoli, Francisco Veirano, Pablo Castro-Lisboa, Fernando Silveira:
High slew-rate OTA with low quiescent current based on non-linear current mirror. 1-4 - Cyril Bottoni, Benjamin Coeffic, Jean-Marc Daveau, Lirida A. B. Naviner
Partial triplication of a SPARC-V8 microprocessor using fault injection. 1-4 - Matías R. Miguez, Alfredo Arnaud
Step down DC/DC converter for micro-power medical applications. 1-4 - Evandro D. C. Cotrim, Luis Henrique de Carvalho Ferreira
Design of an integrated sampling and conversion system for energy meters. 1-4 - Omar Abdelfattah, Ishiang Shih, Gordon W. Roberts, Yi-Chi Shih:
A 0.55-V 1-GHz frequency synthesizer PLL for ultra-low-voltage ultra-low-power applications. 1-4 - Johan Broc, Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Jaume Joven Murillo, Krishna V. Palem, Giovanni De Micheli
A fast pruning technique for low-power inexact Circuit design. 1-4 - Duarte Lopes de Oliveira, Tiago S. Curtinhas, Lester de Abreu Faria, Leonardo Romano:
A novel asynchronous interface with pausible clock for partitioned synchronous modules. 1-4 - Israel Sperotto, Hamilton Klimach, Sergio Bampi
MOS-only M-2M DAC for ultra-low voltage applications. 1-4 - Angelo M. C. R. Borzino, José Antonio Apolinário
Signal enhancement for gunshot DOA estimation with median filters. 1-4 - Henrique Maich, Guilherme Paim
A multi-standard interpolation filter for motion compensated prediction on high definition videos. 1-4 - Clevis Lozano, Andrés Gómez, Alfonso Chacon-Rodriguez
Analysis of source separation algorithms in industrial acoustic environments. 1-4 - J. Ramirez-Ramirez, Juan Mora-Flórez, C. Grajales-Espinal:
Fault location method based on two end measurements at the power distribution system. 1-4 - Jose Alejandro Amaya Palacio, Wilhelmus Adrianus Maria Van Noije:
High Stability Voltage Controlled Current Source for Cervical Cancer Detection using Electrical Impedance Spectroscopy. 1-4 - Gracieli Posser, Lucas de Paris, Vivek Mishra, Palkesh Jain, Ricardo Reis
Reducing the signal Electromigration effects on different logic gates by cell layout optimization. 1-4 - Caio Souza Oliveira, Diogenes C. da Silva Júnior:
Alchemy: An MSP430-based reconfigurable processor architecture. 1-4 - MohammadReza Baghbanmanesh, Franco Maloberti:
On the design of incremental data converters with extended range. 1-4 - Eddie Galarza Zambrano
Evaluation of the clustering of video frames using Rank and Histogram methods with Euclidean and City Block distance measurement for different levels of threshold. 1-4 - Martha Johanna Sepúlveda, Guy Gogniat
TSV protection: Towards secure 3D-MPSoC. 1-4 - Alan Oliveira de Sá, Nadia Nedjah
Multi-hop Collaborative Min-Max localization. 1-4 - Juan Núñez
An approach to the design of low-jitter differential clock recovery circuits for high performance ADCs. 1-4 - Fabian Souza de Andrade, Ygor Oliveira da Guarda Souza, Edson Pinto Santana, Ana Isabela Araújo Cunha:
Image filtering in a CMOS analog CNN. 1-4 - Matthias Schmidt, Carlos Galup-Montoro
Development of a compact model for Tunnel FETs designed for circuit simulation. 1-4 - Matheus Gibiluka, Matheus Trevisan Moreira, Fernando Gehm Moraes
BAT-Hermes: A transition-signaling bundled-data NoC router. 1-4 - Pedro J. Escalona-Cruz, Manuel A. Jiménez-Cedeño, Rogelio Palomera-Garcia:
Automated RDSon characterization for power MOSFETS. 1-4 - Giorgio Lopez, Ettore Napoli, Antonio G. M. Strollo:
FPGA implementation of the CCSDS-123.0-B-1 lossless Hyperspectral Image compression algorithm prediction stage. 1-4 - Ernesto Villegas Castillo, Jiang Chau Wang
Dynamically Reconfigurable NoC using a deadlock-free flexible routing algorithm with a low hardware implementation cost. 1-4 - Israel Schimitz dos Santos, Marilda Machado Spindola:
A study to implement a Brain-Computer Interface (BCI) based on Sensorimotor Rhythms. 1-4 - Julio Pérez Acle
On the functional test of the cache coherency logic in multi-core systems. 1-4 - Salim Lahmiri, Mounir Boukadoum:
Pathology grading in retina digital images using student-adjusted empirical mode decomposition and power law statistics. 1-4 - Jacobus W. Swart
ASIC design and prototyping for education and innovation with a look on Latin America. 1-5 - Reza Hashemian:
S-plane bode plots - identifying poles and zeros in a circuit transfer function. 1-4 - Pablo E. Leibovich, Juan G. Diaz, Javier G. García, Pedro A. Roncagliolo:
Dedicated hardware for FFT based fast acquisition of GNSS signals. 1-4 - Douglas Rodrigues, Caio Cesar Oba Ramos, André Nunes de Souza, João Paulo Papa:
Black Hole Algorithm for non-technical losses characterization. 1-4 - Calebe Conceição, Ricardo Reis
Efficient emulation of quantum circuits on classical hardware. 1-4 - Luis Sanchez, Giancarlo Patino
Hardware implementation of a FPGA-based universal link for LVDS communications. 1-4 - Fabian Höflinger, Rui Zhang, Tobias Volk, Enrique Garea-Rodriguez, Adnan Yousaf
Motion capture sensor to monitor movement patterns in animal models of disease. 1-4 - Alessandra Leonhardt, Luiz Fernando Ferreira, Sergio Bampi
Nanoscale FinFET global parameter extraction for the BSIM-CMG model. 1-4 - Vanessa Vargas
Evaluating SEU fault-injection on parallel applications implemented on multicore processors. 1-4 - Jeferson F. Chaves
Towards reversible QCA computers: Reversible gates and ALU. 1-4 - Nicolás Barabino, Fernando Silveira:
Design optimization of a CMOS RF detector. 1-4 - Leonardo Trigo, Daniel Slomovitz:
Signal processing for a standard harmonic analyzer. 1-3 - Alfredo Arnaud
A complete compact model for flicker noise in MOS transistors. 1-4 - Pedro Toledo, Hamilton Klimach, David Cordova, Sergio Bampi
Resistorless switched-capacitor current reference based on the MOSFET ZTC condition. 1-4 - Antônio Carlos M. de Queiroz, Luiz Carlos Macedo de Oliveira Filho:
Simulation of MEMS energy harvesting generators based on Bennet's doubler. 1-4 - Guilherme Heck, Leandro S. Heck, Matheus T. Moreira, Fernando Gehm Moraes
A digitally controlled oscillator for fine-grained local clock generators in MPSoCs. 1-4 - Rodrigo Bispo dos Santos, Paloma Maria Silva Rocha Rizol
Design of CMOS current-mode multiplier-divider circuit for type-2 FLC applications. 1-4 - Jucemar Monteiro, Guilherme Flach, Marcelo O. Johann, José Luís Almada Güntzel:
An analytical timing-driven algorithm for detailed placement. 1-4 - Somayyeh Rahimian Omam, Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
A study on buffer distribution for RRAM-based FPGA routing structures. 1-4 - Miriam Guadalupe Cruz Jiménez, David Ernesto Troncoso Romero
On simple comb decimation structure based on Chebyshev sharpening. 1-4 - Fernanda D. V. R. Oliveira, José Gabriel Rodríguez Carneiro Gomes, Antonio Petraglia:
Influence of cascode and simple current mirrors in inner product implementations for CMOS imagers. 1-4 - Gustavo Sanchez
S-GMOF: A gradient-based complexity reduction algorithm for depth-maps intra prediction on 3D-HEVC. 1-4 - A. Alzate, Oscar D. Montoya
Optimal location of reclosers in distribution systems considering reliability in communication channels. 1-4 - Diego Tumelero, Guilherme Bontorin, Ricardo Reis
Overhead for independent net approach for Global Routing. 1-4 - J. L. Vázquez-Avila, Remberto Sandoval-Arechiga, B. I. Gea-Garcia, Ramón Parra-Michel, Mario Siller:
Unconventional signal processing architecture for reconfigurable on-chip communication systems. 1-4 - Marcos Takeda, Fernanda Smith, Aldebaro Klautau
A comparison between RS+TCM and LDPC for G.fast channel coding. 1-5 - Thomas C. Jackson, Abhishek A. Sharma, James A. Bain, Jeffrey A. Weldon, Lawrence T. Pileggi:
An RRAM-based Oscillatory Neural Network. 1-4 - Arnaldo Matute
Switched Reluctance Machine fuzzy modeling applied on a MRAC scheme. 1-4 - Luis Eduardo Toledo, Pablo Antonio Petrashin, Walter Jose Lancioni, Carlos Daniel Vázquez:
Threshold voltage extraction circuit for low voltage CMOS design using basic long-channel MOSFET. 1-4 - Jeferson Santiago da Silva, Sergio Bampi
Area-oriented iterative method for Design Space Exploration with High-Level Synthesis. 1-4 - Alexandro Giron-Allende, Victor Avendaño, Esteban Martinez Guerrero:
A design methodology using flip-flops controlled by PVT variation detection. 1-4 - Pablo Ilha Vaz, Alberto Wiltgen Junior, Gilson Inácio Wirth
Techniques for square ELT simulation: A comparative study. 1-4 - L. C. Moro, Rodrigo Wolff Porto:
Single frequency electrical impedance tomography system with offline reconstruction algorithm. 1-4 - Iman Moazzen, Panajotis Agathoklis:
Design of filterbanks using a fast optimization approach. 1-4 - Hugo Daniel Hernández
Configurable low noise readout front-end for gaseous detectors in 130nm CMOS technology. 1-4 - Frédéric Amiel, Boubacar Barry, Maria Trocan, Marc Swynghedauw:
Real time image compression for eye tracking applications. 1-4 - Yann Bacher, Cesar Gori, Nicolas Froidevaux, Philippe Dupre, Henri Braquet, Gilles Jacquemod:
Influence of supplies on fast transient burst test in microcontrollers. 1-4 - M. T. Kousoulis, G. E. Antoniou:
Realization of 4D ladder structured digital filters. 1-4 - César Torres-Huitzil, Marco Aurelio Nuño-Maganda
Robust smartphone-based human activity recognition using a tri-axial accelerometer. 1-4 - Roberto Cerdas-Robles, Juan Agustín Rodriguez, Alfonso Chacon-Rodriguez
Design of an IDM-based determinant computing unit for a 130nm low power CMOS ASIC acoustic localization processor. 1-4 - Gerardo Molina Salgado
Novel two-stage comb decimator with improved frequency characteristic. 1-4 - Flávio H. T. Vieira
Dynamic resource allocation in LTE systems using an algorithm based on Particle Swarm Optimization and βMWM network traffic modeling. 1-4 - Walter E. Calienes Bartra
Modeling the impact of heavy ion on FDSOI NanoCMOS. 1-4 - J. Ramirez-Ramirez, S. Pérez-Londoño, Juan Mora-Flórez:
Analysis of two fault locators considering operation variations of the power distribution systems. 1-4 - Sammy Cerida, Erick Raygada, Carlos Silva, Manuel Monge:
A low-noise fully differential recycling folded cascode neural amplifier. 1-4 - Joel Gak, Alfredo Aruand, Pablo Sergio Mandolesi:
A safe MOSFET driver for stimulation of biological tissue. 1-4 - Ruhan A. Conceição
Hardware design of fast HEVC 2-D IDCT targeting real-time UHD 4K applications. 1-4 - Susan M. Schober, John Choma Jr.:
A charge transfer-based high performance, ultra-low power PLL charge pump. 1-4 - David Altamar, Jorge Martinez, William Toro, Mauricio Pardo
A basic method for the design of an oscillator using an electromechanical resonator. 1-4 - Jonas Kunzler
Further investigation on Frobenius Spectrum for DOA estimation. 1-4 - Víctor Murray
2D amplitude-modulation frequency-modulation - based method for motion estimation. 1-4
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