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"A 0.325 V, 600-kHz, 40-nm 72-kb 9T Subthreshold SRAM with Aligned Boosted ..."

Chien-Yu Lu et al. (2015)

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DOI: 10.1109/TVLSI.2014.2318518

access: closed

type: Journal Article

metadata version: 2020-03-11

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  - https://dblp.org/rec/journals/tvlsi/LuCJTWHKHLK15
Chien-Yu Lu, Ching-Te Chuang, Shyh-Jye Jou, Ming-Hsien Tu, Ya-Ping Wu, Chung-Ping Huang, Paul-Sen Kan, Huan-Shun Huang, Kuen-Di Lee, Yung-Shin Kao:
A 0.325 V, 600-kHz, 40-nm 72-kb 9T Subthreshold SRAM with Aligned Boosted Write Wordline and Negative Write Bitline Write-Assist. IEEE Trans. Very Large Scale Integr. Syst. 23(5): 958-962 (2015)

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