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"A 4.24GHz 128X256 SRAM Operating Double Pump Read Write Same Cycle in 5nm ..."

Nick Zhang et al. (2023)

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DOI: 10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185268

access: closed

type: Conference or Workshop Paper

metadata version: 2023-07-28

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  - conf/vlsit/ZhangKHKTLWYLC23
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  - https://dblp.org/rec/conf/vlsit/ZhangKHKTLWYLC23
Nick Zhang, Young Suk Kim, Peter Hsu, Samsoo Kim, Derek Tao, Hung-Jen Liao, Ping-Wei Wang, Geoffrey Yeap, Quincy Li, Tsung-Yung Jonathan Chang:
A 4.24GHz 128X256 SRAM Operating Double Pump Read Write Same Cycle in 5nm Technology. VLSI Technology and Circuits 2023: 1-2

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