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"High-level synthesis with timing-sensitive information flow enforcement."

Zhenghong Jiang et al. (2018)

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DOI: 10.1145/3240765.3243415

access: closed

type: Conference or Workshop Paper

metadata version: 2022-01-03

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  dblp key:
  - conf/iccad/JiangDSZ18
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  persistent URL:
  - https://dblp.org/rec/conf/iccad/JiangDSZ18
Zhenghong Jiang, Steve Dai, G. Edward Suh, Zhiru Zhang:
High-level synthesis with timing-sensitive information flow enforcement. ICCAD 2018: 88

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