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De-Sheng Chen
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2010 – 2019
- 2016
- [c15]Hong-Son Vu
, Jia-Xian Guo, Kuan-Hung Chen, Shu-Jui Hsieh, De-Sheng Chen:
A real-time moving objects detection and classification approach for static cameras. ICCE-TW 2016: 1-2 - 2010
- [c14]Chengpin Tseng, Chiuyun Hung, De-Sheng Chen, Kuei-Chung Chang, Yiwen Wang:
Application Specific Instruction Set Exploration on VLIW Architectures. ESA 2010: 105-108
2000 – 2009
- 2009
- [c13]Guo-Ming Fang, Jim-Min Lin, Zeng-Wei Hong
An Agent-Based Workflow System for Assisting in IC Design. ACIIDS 2009: 351-355 - 2008
- [c12]Chijie Lin, Jiying Wu, Jerung Shiu, Chiuyun Hung, De-Sheng Chen, Yiwen Wang:
Performance Improvement using Application-Specific Instructions under Hardware Constraints. ICESS 2008: 459-463 - 2007
- [j3]De-Sheng Chen, Chang-Tzu Lin, Yiwen Wang, Ching-Hwa Cheng:
Fixed-outline floorplanning using robust evolutionary search. Eng. Appl. Artif. Intell. 20(6): 821-830 (2007) - [c11]Chang-Tzu Lin, Tai-Wei Kung, De-Sheng Chen, Yiwen Wang, Ching-Hwa Cheng:
Noise-Aware Floorplanning for Fast Power Supply Network Design. ISCAS 2007: 2028-2031 - 2006
- [j2]Chang-Tzu Lin, De-Sheng Chen, Yiwen Wang:
Modern Floorplanning with Boundary and Fixed-outline Constraints via Genetic Clustering Algorithm. J. Circuits Syst. Comput. 15(1): 107-128 (2006) - 2005
- [c10]Chang-Tzu Lin, De-Sheng Chen, Yiwen Wang, Hsin-Hsien Ho:
Modem floorplanning with abutment and fixed-outline constraints. ISCAS (6) 2005: 6214-6217 - 2004
- [c9]Chang-Tzu Lin, De-Sheng Chen, Yiwen Wang:
Robust fixed-outline floorplanning through evolutionary search. ASP-DAC 2004: 42-44 - [c8]Ching-Chung Hu, De-Sheng Chen, Yiwen Wang:
Fast multilevel floorplanning for large scale modules. ISCAS (5) 2004: 205-208 - 2003
- [c7]De-Sheng Chen, Chang-Tzu Lin, Yiwen Wang:
Non-slicing floorplans with boundary constraints using generalized polish expression. ASP-DAC 2003: 342-345 - 2002
- [c6]Chang-Tzu Lin, De-Sheng Chen, Yiwen Wang:
GPE: A New Representation for VLSI Floorplan Problem. ICCD 2002: 42-44 - 2001
- [c5]Zeng-Wei Hong, Jim-Min Lin, De-Sheng Chen, Hewijin Christine Jiau:
DSIAS: A Software Architectural Style for Distributed Software Integration Systems. COMPSAC 2001: 291-296
1990 – 1999
- 1997
- [c4]De-Sheng Chen, Majid Sarrafzadeh:
Cube-embedding based state encoding for low power design. ASP-DAC 1997: 613-618 - 1996
- [j1]De-Sheng Chen, Majid Sarrafzadeh, Gary K. H. Yeap:
State Encoding of Finite State Machines for Low Power Design. J. Circuits Syst. Comput. 6(6): 649-662 (1996) - [c3]De-Sheng Chen, Majid Sarrafzadeh:
An Exact Algorithm for Low Power Library-Specific Gate Re-Sizing. DAC 1996: 783-788 - 1995
- [c2]De-Sheng Chen, Majid Sarrafzadeh, Gary K. H. Yeap:
State Encoding of Finite State Machines for Low Power Design. ISCAS 1995: 2309-2312 - 1992
- [c1]De-Sheng Chen, Majid Sarrafzadeh:
A wire-length minimization algorithm for single-layer layouts. ICCAD 1992: 390-393
Coauthor Index
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