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Hari Shanker Gupta
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2020 – today
- 2024
- [c12]Nishant Kumar, Hari Shanker Gupta, Anuj Srivastava, Nihar Ranjan Mohapatra:
A Programmable and Adaptive Dead-Time Controller for Low-Offset Output Generation for Cryo-Cooler Drive Applications. ISCAS 2024: 1-5 - [c11]Hari Shanker Gupta, Singh Shruti Satyendra, Bhumika Deo, Rane Prathamesh Santosh, Ritesh Khole, Varun Dev Singh, Nishant Kumar, Krish Prakash:
Design and Analysis of 8T Radiation Hardened SRAM using 65nm Process. VDAT 2024: 1-4 - 2023
- [c10]Nishant Kumar, Hari Shanker Gupta, Nilesh M. Desai, Nihar Ranjan Mohapatra:
Sub-nanosecond Delay High Voltage Level Shifter in 0.18μm HV-CMOS Technology for Cryo-Cooler Electronics. APCCAS 2023: 197-201 - [c9]Shivam Nigam, Mukund Murali, Hari Shanker Gupta, Saurabh Saxena:
A 105-525MHz Integer-N Phase-Locked Loop in Indigenous SCL 180nm CMOS. VLSID 2023: 348-352
2010 – 2019
- 2019
- [c8]Satyajit Mohapatra, Hari Shanker Gupta, Nihar Ranjan Mohapatra, Sanjeev Mehta, Arup Roy Chowdhury, Nisha Pandya:
A Mismatch Resilient 16-Bit 20 MS/s Pipelined ADC. VLSID 2019: 305-310 - [c7]Hari Shanker Gupta, Sanjeev Mehta, Maryam Shojaei Baghini
, Arup Roy Chowdhury, A. S. Kiran Kumar, Dinesh Kumar Sharma:
Large Dynamic Range Readout Integrated Circuit for Infrared Detectors. VLSID 2019: 311-316 - 2018
- [c6]Satyajit Mohapatra, Hari Shanker Gupta, Nihar Ranjan Mohapatra:
Mismatch Resilient 3.5-Bit MDAC with MCS-CFCS. ISVLSI 2018: 175-180 - [c5]Hari Shanker Gupta, Pranoy Datta, Maryam Shojaei Baghini, A. S. Kiran Kumar, Dinesh Kumar Sharma:
Low Power Configurable Readout Integrated Circuit for Infrared Detector. VLSID 2018: 198-203 - 2017
- [c4]Satyajit Mohapatra, Hari Shanker Gupta, Jatindeep Singh, Nihar Ranjan Mohapatra:
A 64b/66b Line Encoding for High Speed Serializers. VLSID 2017: 303-308 - 2016
- [c3]Hari Shanker Gupta, Satyajit Mohapatra, Nihar R. Mohapatra, Dinesh Kumar Sharma:
Novel design of a silicon photodetector and its integration in a 4×4 CMOS pixel array. ISQED 2016: 462-467 - 2015
- [c2]Hari Shanker Gupta, Shweta Kirkire, Sunil Bhati, Ravi Shankar Chaurasia, Sanjeev Mehta, Arup Roy Choudhary, Dipen Patel, Jaymin Vaghela:
Bipolar voltage level shifter. VDAT 2015: 1-5 - 2014
- [c1]Hari Shanker Gupta, Subhananda Chakrabarti
Implementation of high performance Readout Integrated Circuit. MWSCAS 2014: 402-405 - 2013
- [j3]Thirupathi Gudi
A fully discrete C0 interior penalty Galerkin approximation of the extended Fisher-Kolmogorov equation. J. Comput. Appl. Math. 247: 1-16 (2013) - [j2]Thirupathi Gudi
Analysis of an Interior Penalty Method for Fourth Order Problems on Polygonal Domains. J. Sci. Comput. 54(1): 177-199 (2013) - 2012
- [j1]Hari Shanker Gupta:
A numerical study of variable coefficient elliptic Cauchy problem via projection method. Int. J. Comput. Math. 89(6): 795-809 (2012)
Coauthor Index
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