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Zhongzhen Tong
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2020 – today
- 2024
- [j10]Yue Zhao
, Yunlong Liu, Jian Zheng, Zhongzhen Tong, Xin Wang, Runru Yu, Xiulong Wu, Yongliang Zhou, Chunyu Peng, Wenjuan Lu, Qiang Zhao, Zhiting Lin:
Configurable in-memory computing architecture based on dual-port SRAM. Microelectron. J. 147: 106163 (2024) - [j9]Zhongzhen Tong
A High Throughput In-MRAM-Computing Scheme Using Hybrid p-SOT-MTJ/GAA-CNTFET. IEEE Trans. Circuits Syst. I Regul. Pap. 71(2): 606-619 (2024) - [j8]Jin Zhang
A Computing In-Memory Multibit Multiplication Based on Decoupling and In-Array Storing. IEEE Trans. Circuits Syst. I Regul. Pap. 71(8): 3658-3671 (2024) - [j7]Kaili Zhang, Zhongzhen Tong
A Charge-Domain Compute-In-Memory Macro With Cell-Embedded DA Conversion and Two-Stage AD Conversion for Bit-Scalable MAC Operation. IEEE Trans. Circuits Syst. II Express Briefs 71(3): 1077-1081 (2024) - 2023
- [j6]Zhiting Lin
In Situ Storing 8T SRAM-CIM Macro for Full-Array Boolean Logic and Copy Operations. IEEE J. Solid State Circuits 58(5): 1472-1486 (2023) - [j5]Zhiting Lin
A Fully Digital SRAM-Based Four-Layer In-Memory Computing Unit Achieving Multiplication Operations and Results Store. IEEE Trans. Very Large Scale Integr. Syst. 31(6): 776-788 (2023) - [j4]Zhongzhen Tong
In-Memory Transposable Multibit Multiplication Based on Diagonal Symmetry Weight Block. IEEE Trans. Very Large Scale Integr. Syst. 31(9): 1454-1458 (2023) - 2022
- [j3]Yue Zhao
An offset cancellation technique for SRAM sense amplifier based on relation of the delay and offset. Microelectron. J. 128: 105578 (2022) - [j2]Jin Zhang
In-Memory Multibit Multiplication Based on Bitline Shifting. IEEE Trans. Circuits Syst. II Express Briefs 69(2): 354-358 (2022) - [j1]Yue Zhao
Configurable Memory With a Multilevel Shared Structure Enabling In-Memory Computing. IEEE Trans. Very Large Scale Integr. Syst. 30(5): 566-578 (2022)
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