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Félix Moreno
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2010 – 2019
- 2019
- [j11]David Aledo
, Benjamin Carrión Schäfer
VHDL vs. SystemC: Design of Highly Parameterizable Artificial Neural Networks. IEICE Trans. Inf. Syst. 102-D(3): 512-521 (2019) - [j10]Monica Villaverde, David Aledo
On the adaptability of ensemble methods for distributed classification systems: A comparative analysis. Int. J. Distributed Sens. Networks 15(7) (2019) - [j9]Siyuan Xu
Design space exploration of heterogeneous MPSoCs with variable number of hardware accelerators. Microprocess. Microsystems 65: 169-179 (2019) - 2017
- [c9]Benjamin Carrión Schäfer
Application Specific Behavioral Synthesis Design Space Exploration: Artificial Neural Networks. A Case Study. DSD 2017: 129-136 - [c8]Yidi Liu, Monica Villaverde, Félix Moreno, Benjamin Carrión Schäfer
Characterization and optimization of behavioral hardware accelerators in heterogeneous MPSoCs. ReCoSoC 2017: 1-8 - 2015
- [j8]Wei Li, Jorge Portilla, Félix Moreno, Guixuan Liang, Teresa Riesgo:
Multiple feature points representation in target localization of wireless visual sensor networks. J. Netw. Comput. Appl. 57: 119-128 (2015) - [j7]Monica Villaverde, David Perez, Félix Moreno:
Self-Learning Embedded System for Object Identification in Intelligent Infrastructure Sensors. Sensors 15(11): 29056-29078 (2015) - [j6]Alfonso Rodríguez, Félix Moreno:
Evolutionary Computing and Particle Filtering: A Hardware-Based Motion Estimation System. IEEE Trans. Computers 64(11): 3140-3152 (2015) - 2014
- [c7]Monica Villaverde, David Perez, Félix Moreno:
Cooperative learning model based on multi-agent architecture for embedded intelligent systems. IECON 2014: 2724-2730 - [c6]David Perez, Monica Villaverde, Félix Moreno, Noemi Nogar, Felix Ezcurra, Ekaitz Aznar:
Low-cost radar-based target identification prototype using an expert system. INDIN 2014: 54-59 - 2012
- [j5]Rubén Salvador
Accelerating FPGA-based evolution of wavelet transform filters by optimized task scheduling. Microprocess. Microsystems 36(5): 427-438 (2012) - [c5]Félix Moreno, David Aledo
The DLMT hardware implementation. A comparative study with the DCT and the DWT. IECON 2012: 1591-1596 - 2011
- [j4]Rubén Salvador
Evolutionary Approach to Improve Wavelet Transforms for Image Compression in Embedded Systems. EURASIP J. Adv. Signal Process. 2011 (2011) - 2010
- [c4]Rubén Salvador
Evolutionary design and optimization of Wavelet Transforms for image compression in embedded systems. AHS 2010: 171-178 - [c3]Rubén Salvador
High Level Validation of an Optimization Algorithm for the Implementation of Adaptive Wavelet Transforms in FPGAs. DSD 2010: 96-103 - [c2]Félix Moreno, Ignacio López, Ricardo Sanz:
A Design Process for Hardware/Software System Co-design and its Application to Designing a Reconfigurable FPGA. DSD 2010: 556-562
2000 – 2009
- 2009
- [j3]Félix Moreno, Jaime Alarcón, Rubén Salvador
Reconfigurable Hardware Architecture of a Shape Recognition System Based on Specialized Tiny Neural Networks With Online Training. IEEE Trans. Ind. Electron. 56(8): 3253-3263 (2009)
1990 – 1999
- 1997
- [j2]José M. Fernández, Félix Moreno, Juan M. Meneses:
An approach to the design of RISC core processors for VLSI embedded systems. J. Syst. Archit. 43(1-5): 33-37 (1997) - 1996
- [j1]José M. Fernández, Félix Moreno, Juan M. Meneses:
A High-Performance Architecture with a Macroblock-Level-Pipeline for MPEG-2 Coding. Real Time Imaging 2(6): 331-340 (1996) - 1994
- [c1]Félix Moreno, Juan M. Meneses:
A new knowledge-based design manager assistant for CAD frameworks. EURO-DAC 1994: 348-353
Coauthor Index
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