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Haocong Luo
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2020 – today
- 2024
- [j4]Lois Orosa
, Ulrich Rührmair, Abdullah Giray Yaglikçi
SpyHammer: Understanding and Exploiting RowHammer Under Fine-Grained Temperature Variations. IEEE Access 12: 80986-81003 (2024) - [j3]Haocong Luo
Ramulator 2.0: A Modern, Modular, and Extensible DRAM Simulator. IEEE Comput. Archit. Lett. 23(1): 112-116 (2024) - [j2]Haocong Luo
RowPress Vulnerability in Modern DRAM Chips. IEEE Micro 44(4): 60-69 (2024) - [c16]Steve Rhyner
PIM-Opt: Demystifying Distributed Optimization Algorithms on a Real-World Processing-In-Memory System. PACT 2024: 201-218 - [c15]Haocong Luo, Ismail Emir Yüksel, Ataberk Olgun, A. Giray Yaglikçi, Mohammad Sadrosadati, Onur Mutlu:
An Experimental Characterization of Combined RowHammer and RowPress Read Disturbance in Modern DRAM Chips. DSN-S 2024: 6-11 - [c14]Ataberk Olgun, Majd Osseiran, A. Giray Yaglikçi, Yahya Can Tugrul, Haocong Luo, Steve Rhyner, Behzad Salami, Juan Gómez-Luna, Onur Mutlu:
Read Disturbance in High Bandwidth Memory: A Detailed Experimental Study on HBM2 DRAM Chips. DSN 2024: 75-89 - [c13]Ismail Emir Yüksel, Yahya Can Tugrul, F. Nisa Bostanci, Geraldo F. Oliveira, A. Giray Yaglikçi, Ataberk Olgun, Melina Soysal, Haocong Luo, Juan Gómez-Luna, Mohammad Sadrosadati, Onur Mutlu:
Simultaneous Many-Row Activation in Off-the-Shelf DRAM Chips: Experimental Characterization and Analysis. DSN 2024: 99-114 - [c12]Ismail Emir Yüksel, Yahya Can Tugrul, Ataberk Olgun, F. Nisa Bostanci, Abdullah Giray Yaglikçi, Geraldo F. Oliveira, Haocong Luo, Juan Gómez-Luna, Mohammad Sadrosadati, Onur Mutlu:
Functionally-Complete Boolean Logic in Real DRAM Chips: Experimental Characterization and Analysis. HPCA 2024: 280-296 - [c11]Abdullah Giray Yaglikçi, Yahya Can Tugrul, Geraldo F. Oliveira, Ismail Emir Yüksel, Ataberk Olgun, Haocong Luo, Onur Mutlu:
Spatial Variation-Aware Read Disturbance Defenses: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions. HPCA 2024: 560-577 - [c10]Hasan Hassan, Ataberk Olgun, A. Giray Yaglikçi, Haocong Luo, Onur Mutlu:
Self-Managing DRAM: A Low-Cost Framework for Enabling Autonomous and Efficient DRAM Maintenance Operations. MICRO 2024: 949-965 - [c9]Ataberk Olgun, Yahya Can Tugrul, Nisa Bostanci, Ismail Emir Yuksel, Haocong Luo, Steve Rhyner, Abdullah Giray Yaglikçi, Geraldo F. Oliveira, Onur Mutlu:
ABACuS: All-Bank Activation Counters for Scalable and Low Overhead RowHammer Mitigation. USENIX Security Symposium 2024 - [i23]Minesh Patel, Taha Shahroodi, Aditya Manglik, Abdullah Giray Yaglikçi, Ataberk Olgun, Haocong Luo, Onur Mutlu:
Rethinking the Producer-Consumer Relationship in Modern DRAM-Based Systems. CoRR abs/2401.16279 (2024) - [i22]Abdullah Giray Yaglikçi, Yahya Can Tugrul, Geraldo F. Oliveira, Ismail Emir Yüksel, Ataberk Olgun, Haocong Luo, Onur Mutlu:
Spatial Variation-Aware Read Disturbance Defenses: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions. CoRR abs/2402.18652 (2024) - [i21]Ismail Emir Yuksel, Yahya Can Tugrul, Ataberk Olgun, F. Nisa Bostanci, Abdullah Giray Yaglikçi, Geraldo F. Oliveira, Haocong Luo, Juan Gómez-Luna, Mohammad Sadrosadati, Onur Mutlu:
Functionally-Complete Boolean Logic in Real DRAM Chips: Experimental Characterization and Analysis. CoRR abs/2402.18736 (2024) - [i20]Steve Rhyner, Haocong Luo, Juan Gómez-Luna, Mohammad Sadrosadati, Jiawei Jiang, Ataberk Olgun, Harshita Gupta, Ce Zhang, Onur Mutlu:
Analysis of Distributed Optimization Algorithms on a Real Processing-In-Memory System. CoRR abs/2404.07164 (2024) - [i19]Ismail Emir Yuksel, Yahya Can Tugrul, F. Nisa Bostanci, Geraldo F. Oliveira, Abdullah Giray Yaglikçi, Ataberk Olgun, Melina Soysal, Haocong Luo, Juan Gómez-Luna, Mohammad Sadrosadati, Onur Mutlu:
Simultaneous Many-Row Activation in Off-the-Shelf DRAM Chips: Experimental Characterization and Analysis. CoRR abs/2405.06081 (2024) - [i18]Haocong Luo, Ismail Emir Yüksel, Ataberk Olgun, A. Giray Yaglikçi, Mohammad Sadrosadati, Onur Mutlu:
An Experimental Characterization of Combined RowHammer and RowPress Read Disturbance in Modern DRAM Chips. CoRR abs/2406.13080 (2024) - [i17]Haocong Luo, Ataberk Olgun, A. Giray Yaglikçi, Yahya Can Tugrul, Steve Rhyner, Meryem Banu Cavlak, Joël Lindegger, Mohammad Sadrosadati, Onur Mutlu:
RowPress Vulnerability in Modern DRAM Chips. CoRR abs/2406.16153 (2024) - 2023
- [j1]Ataberk Olgun
DRAM Bender: An Extensible and Versatile FPGA-Based Infrastructure to Easily Test State-of-the-Art DRAM Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(12): 5098-5112 (2023) - [c8]Ataberk Olgun, Majd Osseiran, Abdullah Giray Yaglikçi, Yahya Can Tugrul, Haocong Luo, Steve Rhyner, Behzad Salami, Juan Gómez-Luna, Onur Mutlu:
An Experimental Analysis of RowHammer in HBM2 DRAM Chips. DSN-S 2023: 151-156 - [c7]Haocong Luo
RowPress: Amplifying Read Disturbance in Modern DRAM Chips. ISCA 2023: 28:1-28:18 - [i16]Ataberk Olgun, Majd Osseiran, Abdullah Giray Yaglikçi, Yahya Can Tugrul, Haocong Luo, Steve Rhyner, Behzad Salami, Juan Gómez-Luna, Onur Mutlu:
An Experimental Analysis of RowHammer in HBM2 DRAM Chips. CoRR abs/2305.17918 (2023) - [i15]Haocong Luo, Ataberk Olgun, Abdullah Giray Yaglikçi, Yahya Can Tugrul, Steve Rhyner, Meryem Banu Cavlak, Joël Lindegger, Mohammad Sadrosadati, Onur Mutlu:
RowPress: Amplifying Read Disturbance in Modern DRAM Chips. CoRR abs/2306.17061 (2023) - [i14]Haocong Luo, Yahya Can Tugrul, F. Nisa Bostanci, Ataberk Olgun, Abdullah Giray Yaglikçi, Onur Mutlu:
Ramulator 2.0: A Modern, Modular, and Extensible DRAM Simulator. CoRR abs/2308.11030 (2023) - [i13]Ataberk Olgun, Yahya Can Tugrul, Nisa Bostanci, Ismail Emir Yuksel, Haocong Luo, Steve Rhyner, Abdullah Giray Yaglikçi, Geraldo F. Oliveira, Onur Mutlu:
ABACuS: All-Bank Activation Counters for Scalable and Low Overhead RowHammer Mitigation. CoRR abs/2310.09977 (2023) - [i12]Ataberk Olgun, Majd Osseiran, Abdullah Giray Yaglikçi, Yahya Can Tugrul, Haocong Luo, Steve Rhyner, Behzad Salami, Juan Gómez-Luna, Onur Mutlu:
Understanding Read Disturbance in High Bandwidth Memory: An Experimental Analysis of Real HBM2 DRAM Chips. CoRR abs/2310.14665 (2023) - [i11]Ismail Emir Yuksel, Yahya Can Tugrul, F. Nisa Bostanci, Abdullah Giray Yaglikçi, Ataberk Olgun, Geraldo F. Oliveira, Melina Soysal, Haocong Luo, Juan Gómez-Luna, Mohammad Sadrosadati, Onur Mutlu:
PULSAR: Simultaneous Many-Row Activation for Reliable and High-Performance Computing in Off-the-Shelf DRAM Chips. CoRR abs/2312.02880 (2023) - 2022
- [c6]Abdullah Giray Yaglikçi, Haocong Luo, Geraldo F. de Oliviera, Ataberk Olgun, Minesh Patel, Jisung Park, Hasan Hassan, Jeremie S. Kim, Lois Orosa
Understanding RowHammer Under Reduced Wordline Voltage: An Experimental Study Using Real DRAM Devices. DSN 2022: 475-487 - [c5]Abdullah Giray Yaglikçi, Ataberk Olgun, Minesh Patel, Haocong Luo, Hasan Hassan, Lois Orosa, Oguz Ergin
HiRA: Hidden Row Activation for Reducing Refresh Latency of Off-the-Shelf DRAM Chips. MICRO 2022: 815-834 - [i10]Minesh Patel, Taha Shahroodi, Aditya Manglik, Abdullah Giray Yaglikçi, Ataberk Olgun, Haocong Luo, Onur Mutlu:
A Case for Transparent Reliability in DRAM Systems. CoRR abs/2204.10378 (2022) - [i9]Abdullah Giray Yaglikçi, Haocong Luo, Geraldo F. de Oliviera, Ataberk Olgun, Minesh Patel, Jisung Park
Understanding RowHammer Under Reduced Wordline Voltage: An Experimental Study Using Real DRAM Devices. CoRR abs/2206.09999 (2022) - [i8]Hasan Hassan, Ataberk Olgun, Abdullah Giray Yaglikçi, Haocong Luo, Onur Mutlu:
A Case for Self-Managing DRAM Chips: Improving Performance, Efficiency, Reliability, and Security via Autonomous in-DRAM Maintenance Operations. CoRR abs/2207.13358 (2022) - [i7]Abdullah Giray Yaglikçi, Ataberk Olgun, Minesh Patel, Haocong Luo, Hasan Hassan, Lois Orosa
HiRA: Hidden Row Activation for Reducing Refresh Latency of Off-the-Shelf DRAM Chips. CoRR abs/2209.10198 (2022) - [i6]Lois Orosa
SpyHammer: Using RowHammer to Remotely Spy on Temperature. CoRR abs/2210.04084 (2022) - [i5]Ataberk Olgun, Hasan Hassan, Abdullah Giray Yaglikçi, Yahya Can Tugrul, Lois Orosa
DRAM Bender: An Extensible and Versatile FPGA-based Infrastructure to Easily Test State-of-the-art DRAM Chips. CoRR abs/2211.05838 (2022) - 2021
- [c4]Lois Orosa
CODIC: A Low-Cost Substrate for Enabling Custom In-DRAM Functionalities and Optimizations. ISCA 2021: 484-497 - [c3]Ataberk Olgun, Minesh Patel, Abdullah Giray Yaglikçi, Haocong Luo, Jeremie S. Kim, Nisa Bostanci, Nandita Vijaykumar, Oguz Ergin
QUAC-TRNG: High-Throughput True Random Number Generation Using Quadruple Row Activation in Commodity DRAM Chips. ISCA 2021: 944-957 - [c2]Lois Orosa
A Deeper Look into RowHammer's Sensitivities: Experimental Analysis of Real DRAM Chipsand Implications on Future Attacks and Defenses. MICRO 2021: 1182-1197 - [i4]Ataberk Olgun, Minesh Patel, Abdullah Giray Yaglikçi, Haocong Luo, Jeremie S. Kim, Nisa Bostanci, Nandita Vijaykumar, Oguz Ergin, Onur Mutlu:
QUAC-TRNG: High-Throughput True Random Number Generation Using Quadruple Row Activation in Commodity DRAM Chips. CoRR abs/2105.08955 (2021) - [i3]Lois Orosa, Yaohua Wang, Mohammad Sadrosadati, Jeremie S. Kim, Minesh Patel, Ivan Puddu, Haocong Luo, Kaveh Razavi, Juan Gómez-Luna, Hasan Hassan, Nika Mansouri-Ghiasi, Saugata Ghose, Onur Mutlu:
CODIC: A Low-Cost Substrate for Enabling Custom In-DRAM Functionalities and Optimizations. CoRR abs/2106.05632 (2021) - [i2]Lois Orosa, Abdullah Giray Yaglikçi, Haocong Luo, Ataberk Olgun, Jisung Park, Hasan Hassan, Minesh Patel, Jeremie S. Kim, Onur Mutlu:
A Deeper Look into RowHammer's Sensitivities: Experimental Analysis of Real DRAM Chips and Implications on Future Attacks and Defenses. CoRR abs/2110.10291 (2021) - 2020
- [c1]Haocong Luo, Taha Shahroodi, Hasan Hassan, Minesh Patel, Abdullah Giray Yaglikçi
CLR-DRAM: A Low-Cost DRAM Architecture Enabling Dynamic Capacity-Latency Trade-Off. ISCA 2020: 666-679 - [i1]Haocong Luo, Taha Shahroodi, Hasan Hassan, Minesh Patel, Abdullah Giray Yaglikçi, Lois Orosa, Jisung Park, Onur Mutlu:
CLR-DRAM: A Low-Cost DRAM Architecture Enabling Dynamic Capacity-Latency Trade-Off. CoRR abs/2005.12775 (2020)
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last updated on 2024-12-11 20:43 CET by the dblp team
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