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German Leon
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2020 – today
- 2024
- [j13]José M. Badía, German Leon, Mario García-Valderas, Jose A. Belloch, Almudena Lindoso, Luis Entrena:
Analysing the radiation reliability, performance and energy consumption of low-power SoC through heterogeneous parallelism. Sustain. Comput. Informatics Syst. 44: 101049 (2024) - [j12]German Leon
, José M. Badía, Jose A. Belloch
Comparative analysis of soft-error sensitivity in LU decomposition algorithms on diverse GPUs. J. Supercomput. 80(9): 12844-12862 (2024) - [j11]Jose A. Belloch
Urban sound classification using neural networks on embedded FPGAs. J. Supercomput. 80(9): 13176-13186 (2024) - 2022
- [j10]Susana Loredo
Fast Transmitarray Synthesis with Far-Field and Near-Field Constraints. Sensors 22(12): 4355 (2022) - [j9]Jose A. Belloch
Multicore implementation of a multichannel parallel graphic equalizer. J. Supercomput. 78(14): 15715-15729 (2022) - 2021
- [j8]Jose A. Belloch
Evaluating the computational performance of the Xilinx Ultrascale+ EG Heterogeneous MPSoC. J. Supercomput. 77(2): 2124-2137 (2021) - 2020
- [j7]Germán León
Wideband Epidermal Antenna for Medical Radiometry. Sensors 20(7): 1987 (2020)
2010 – 2019
- 2019
- [j6]Germán León
Noise estimation for hyperspectral subspace identification on FPGAs. J. Supercomput. 75(3): 1323-1335 (2019) - 2015
- [j5]José Ignacio Aliaga
Unveiling the performance-energy trade-off in iterative linear system solvers for multithreaded processors. Concurr. Comput. Pract. Exp. 27(4): 885-904 (2015) - [j4]Germán León
Exploring the performance-power-energy balance of low-power multicore and manycore architectures for anomaly detection in remote sensing. J. Supercomput. 71(5): 1893-1906 (2015) - 2014
- [j3]Sergio Sánchez, Germán León
Assessing the Performance-Energy Balance of Graphics Processors for Spectral Unmixing. IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens. 7(6): 2305-2316 (2014) - 2013
- [c7]José Ignacio Aliaga
Performance and Energy Analysis of the Iterative Solution of Sparse Linear Systems on Multicore and Manycore Architectures. PPAM (1) 2013: 772-782 - 2011
- [c6]German Leon
Automatic Type Inference for Resynthesis on Hardware Description Languages. ReConFig 2011: 455-461 - 2010
- [j2]José M. Claver
A reconfigurable platform for evaluating the performance of QoS networks. J. Syst. Archit. 56(4-6): 191-207 (2010)
2000 – 2009
- 2009
- [j1]Raúl Marín
Remote Programming of Network Robots Within the UJI Industrial Robotics Telelaboratory: FPGA Vision and SNRP Network Protocol. IEEE Trans. Ind. Electron. 56(12): 4806-4816 (2009) - 2008
- [c5]Jorge Sales
The UJI industrial robotics telelaboratory: Real-time vision and networking. IROS 2008: 4136 - 2007
- [c4]José M. Claver
A Reprogrammable and Scalable Multimedia Traffic Generator/Monitor on FPGA. FPL 2007: 567-570 - [c3]José M. Claver
High Level Power Optimization by Type Inference on the Generation of Application Specific Circuits on FPGAs. FPL 2007: 629-632 - 2006
- [c2]José Manuel Claver, Manel Canseco, P. Agustí, Germán León:
A Hardware NIC Scheduler to Guarantee QoS on High Performance Servers. ISPA 2006: 86-97
1990 – 1999
- 1999
- [c1]Germán Fabregat, Jose V. Marti, German Leon:
Parity Sensitive Comparators. PRDC 1999: 53-61
Coauthor Index
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