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Taito Manabe
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2020 – today
- 2024
- [j8]Masahiro Nishimura, Taito Manabe, Yuichiro Shibata:
Pipelined ADPCM Compression for HDR Synthesis on an FPGA. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 107(3): 531-539 (2024) - [c19]Daiki Furukawa, Taito Manabe, Yuichiro Shibata, Tomohiro Ueno, Kentaro Sano:
HLS Implementation of a Building Cube Stencil Computation Framework for an FPGA Accelerator. ICCE 2024: 1-6 - [c18]Haruto Ikehara, Taito Manabe, Yuichiro Shibata, Tomohiro Ueno, Kentaro Sano:
A Productive HLS Simulation Approach for Multi-FPGA Systems. ICCE 2024: 1-2 - [c17]Shintaro Matsui, Katsuaki Kamimae, Haruto Ikehara, Takuho Kawazu, Huang Yuwei, Masahiro Nishimura, Shuto Abe, Kenyu Okino, Yuta Hashiguchi, Kengo Yanagihara, Takumi Obayashi, Kim Chaeseung, Tatsunosuke Shiota, Yukito Taguchi, Ryuki Tsuruda, Taito Manabe, Yuichiro Shibata:
Rust-Based Memory-Safe Design of SoC FPGA Unmanned Mobile Vehicles. ICCE 2024: 1-2 - 2023
- [j7]Taito Manabe, Yuichiro Shibata:
Real-Time Image-Based Vibration Extraction with Memory-Efficient Optical Flow and Block-Based Adaptive Filter. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 106(3): 504-513 (2023) - [c16]Takehiro Miura, Shuto Abe, Taito Manabe, Yuichiro Shibata, Taiichiro Kosaka, Tomohiko Adachi:
Efficient FPGA Implementation of a Convolutional Neural Network for Surgical Image Segmentation Focusing on Recursive Structure. CISIS 2023: 137-148 - [c15]Yasutoshi Araki, Takuho Kawazu, Taito Manabe, Yoichi Ishizuka, Yuichiro Shibata:
A Mobile-Oriented GPU Implementation of a Convolutional Neural Network for Object Detection. CISIS 2023: 149-160 - 2022
- [j6]Tatsuma Mori, Taito Manabe, Yuichiro Shibata:
A Hardware Oriented Approximate Convex Hull Algorithm and its FPGA Implementation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 105-A(3): 459-467 (2022) - [j5]Taito Manabe, Taichi Katayama, Yuichiro Shibata:
FPGA Implementation of a Stream-Based Real-Time Hardware Line Segment Detector. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 105-A(3): 468-477 (2022) - [j4]Taichi Saikai, Kotoko Miyata, Taito Manabe, Yuichiro Shibata:
Evaluation of Directive-based Heterogeneous Redundant Design Approaches for Functional Safety Systems on FPGAs. Int. J. Netw. Comput. 12(2): 387-405 (2022) - [c14]Yasutoshi Araki, Masatomo Matsuda, Taito Manabe, Yoichi Ishizuka, Yuichiro Shibata:
FPGA Implementation of an Object Recognition System with Low Power Consumption Using a YOLOv3-tiny-based CNN. CISIS 2022: 223-233 - [c13]Katsuaki Kamimae, Shintaro Matsui, Yasutoshi Araki, Takehiro Miura, Keigo Motoyoshi, Keizo Yamashita, Haruto Ikehara, Takuho Kawazu, Huang Yuwei, Masahiro Nishimura, Shuto Abe, Kenyu Okino, Yuta Hashiguchi, Koki Fukuda, Kengo Yanagihara, Taito Manabe, Yuichiro Shibata:
A Lane Detection Hardware Algorithm Based on Helmholtz Principle and Its Application to Unmanned Mobile Vehicles. FPT 2022: 1-4 - [c12]Masahiro Nishimura, Yuta Imamura, Taito Manabe, Yuichiro Shibata:
FPGA implementation of HDR synthesis processing with image compression techniques. FPT 2022: 1-2 - [c11]Tatsuma Mori, Daiki Furukawa, Keigo Motoyoshi, Haruto Ikehara, Kaito Ohira, Taito Manabe, Yuichiro Shibata, Tomohiro Ueno, Kentaro Sano:
Stream Computation of 3D Approximate Convex Hulls with an FPGA. HEART 2022: 69-75 - [c10]Shintaro Matsui, Taito Manabe, Yuichiro Shibata:
FPGA implementation of contour detection based on Helmholtz principle. CANDARW 2022: 411-415 - 2021
- [c9]Keigo Motoyoshi, Yuta Imamura, Taichi Saikai, Koki Fujita, Daiki Furukawa, Masatomo Matsuda, Tatsuma Mori, Yasutoshi Araki, Takehiro Miura, Keizo Yamashita, Haruto Ikehara, Kaito Ohira, Katsuaki Kamimae, Takuho Kawazu, Masahiro Nishimura, Shintaro Matsui, Koki Tomonaga, Taito Manabe, Yuichiro Shibata:
SoC FPGA implementation of an unmanned mobile vehicle with an image transmission system over VNC. FPT 2021: 1-4 - [c8]Taichi Saikai, Kotoko Miyata, Taito Manabe, Yuichiro Shibata:
Evaluation of an HLS-based heterogeneous redundant design approach for functional safety systems on FPGAs. CANDAR 2021: 162-167 - [c7]Yuta Imamura, Shota Fukui, Taito Manabe, Yuichiro Shibata:
An FPGA-based Power-saving Particle Filter Using Dynamic Reconfiguration. CANDAR (Workshops) 2021: 439-443 - 2020
- [j3]Taito Manabe, Kazuya Uetsuhara, Akane Tahara, Yuichiro Shibata:
FPGA Implementation and Evaluation of a Real-Time Image-Based Vibration Detection System with Adaptive Filtering. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 103-A(12): 1472-1480 (2020) - [j2]Taito Manabe, Koki Tomonaga, Koki Fujita, Yuichiro Shibata, Taiichiro Kosaka, Tomohiko Adachi:
CNN Architecture for Surgical Image Segmentation with Recursive Structure and Flip-Based Upsampling. Int. J. Netw. Comput. 10(2): 259-276 (2020) - [c6]Tatsuma Mori, Taito Manabe, Yuichiro Shibata:
Fast and Memory Efficient Approximated Convex Hull Computation with FPGA. CANDAR 2020: 174-180
2010 – 2019
- 2019
- [c5]Taito Manabe, Koki Tomonaga, Yuichiro Shibata:
CNN Architecture for Surgical Image Segmentation Systems with Recursive Network Structure to Mitigate Overfitting. CANDAR 2019: 171-177 - [c4]Taito Manabe, Naofumi Yoshinaga, Yuta Imamura, Taichi Saikai, Koki Fujita, Masatomo Matsuda, Kotoko Miyata, Tatsuma Mori, Yuichiro Shibata, Hiroki Egawa, Yuichi Kawamata, Tomohiro Kida, Ryouhei Tsugami, Ryohei Kakizaki, Taichi Katayama, Koki Tomonaga, Shota Fukui:
Autonomous Vehicle Driving Using the Stream-Based Real-Time Hardware Line Detector. FPT 2019: 461-464 - 2018
- [j1]Taito Manabe, Yuichiro Shibata, Kiyoshi Oguri:
FPGA Implementation of a Real-Time Super-Resolution System Using Flips and an RNS-Based CNN. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 101-A(12): 2280-2289 (2018) - [c3]Kazuya Uetsuhara, Akane Tahara, Taito Manabe, Yuichiro Shibata:
Implementation of a Real-Time Image-Based Vibration Detection and Adaptive Filtering on an FPGA. DASIP 2018: 54-59 - 2017
- [c2]Taito Manabe, Yuichiro Shibata, Kiyoshi Oguri:
FPGA implementation of a real-time super-resolution system with a CNN based on a residue number system. FPT 2017: 299-300 - 2016
- [c1]Taito Manabe, Yuichiro Shibata, Kiyoshi Oguri:
FPGA implementation of a real-time super-resolution system using a convolutional neural network. FPT 2016: 249-252
Coauthor Index
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last updated on 2024-08-05 20:24 CEST by the dblp team
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