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Hoang Gia Vu

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2020 – today

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2022
[c4]
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  - conf/coolchips/VuB22
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Hoang Gia Vu, Ngoc-Dai Bui:
Encoder-based Many-Pattern Matching on FPGAs. COOL CHIPS 2022: 1-5
2021
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Hoang Gia Vu, Takashi Nakada, Yasuhiko Nakashima:
Efficient hardware task migration for heterogeneous FPGA computing using HDL-based checkpointing. Integr. 77: 180-192 (2021)

2010 – 2019

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2018
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  - journals/ieicet/VuTNN18
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Hoang Gia Vu, Shinya Takamaeda-Yamazaki, Takashi Nakada, Yasuhiko Nakashima:
A Tree-Based Checkpointing Architecture for the Dependability of FPGA Computing. IEICE Trans. Inf. Syst. 101-D(2): 288-302 (2018)
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Hoang Gia Vu, Takashi Nakada, Yasuhiko Nakashima:
Efficient Multitasking on FPGA Using HDL-Based Checkpointing. ARC 2018: 590-602
2017
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  - conf/fccm/VuTNN17
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Hoang Gia Vu, Shinya Takamaeda-Yamazaki, Takashi Nakada, Yasuhiko Nakashima:
CPRring: A Structure-Aware Ring-Based Checkpointing Architecture for FPGA Computing. FCCM 2017: 192
2016
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  - conf/ic-nc/VuKTN16
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Hoang Gia Vu, Supasit Kajkamhaeng, Shinya Takamaeda-Yamazaki, Yasuhiko Nakashima:
CPRtree: A Tree-Based Checkpointing Architecture for Heterogeneous FPGA Computing. CANDAR 2016: 57-66

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