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Mostafa M. Ayesh
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2020 – today
- 2024
- [c6]Mostafa M. Ayesh, Soumya Mahapatra, Ce Yang, Mike Shuo-Wei Chen:
5.3 A 0.072mm2 18-to-21GHz Non-Uniform Sub-Sampling Receiver with a Non-Uniform Discrete-Time FIR Filter Achieving 42dB Blocker Rejection in 28nm CMOS. ISSCC 2024: 92-94 - 2021
- [c5]Aoyang Zhang, Mostafa M. Ayesh, Soumya Mahapatra, Mike Shuo-Wei Chen:
A 24-28 GHz Concurrent Harmonic and Subharmonic Tuning Class E/F2, 2/3 Subharmonic Switching Power Amplifier Achieving Peak/PBO Efficiency Enhancement. CICC 2021: 1-2 - [c4]Aoyang Zhang, Ce Yang, Mostafa M. Ayesh, Mike Shuo-Wei Chen:
26.6 A 5-to-6GHz Current-Mode Subharmonic Switching Digital Power Amplifier for Enhancing Power Back-Off Efficiency. ISSCC 2021: 364-366
2010 – 2019
- 2016
- [c3]Mostafa M. Ayesh, Sameh Ibrahim, Mohamed M. Aboudina:
Design and analysis of a low-power high-speed charge-steering based StrongARM comparator. ICM 2016: 209-212 - 2015
- [c2]Mostafa M. Ayesh, Sameh A. Ibrahim, Hani Fikry Ragai, Mohamed M. Rizk:
A low-power high-speed charge-steering ADC-based equalizer for serial links. ICECS 2015: 500-501 - [c1]Mostafa M. Ayesh, Sameh Ibrahim, Mohamed M. Aboudina:
A 15.5-mW 20-GSps 4-bit charge-steering flash ADC. MWSCAS 2015: 1-4
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last updated on 2024-10-07 21:22 CEST by the dblp team
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