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Chunseok Jeong
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2020 – today
- 2024
- [j2]Sungweon Hong
, Yunseob Tae
Analog Circuit Design Automation via Sequential RL Agents and Gm/ID Methodology. IEEE Access 12: 104473-104489 (2024) - [c12]Minseok Seo
IANUS: Integrated Accelerator based on NPU-PIM Unified Memory System. ASPLOS (3) 2024: 545-560 - [c11]Jinhyung Lee, Kyungjun Cho, Chang Kwon Lee, Yeonho Lee, Jae-Hyung Park, Su-Hyun Oh, Yucheon Ju, Chunseok Jeong, Ho Sung Cho, Jaeseung Lee, Tae-Sik Yun, Jin Hee Cho, Sangmuk Oh, Junil Moon, Young-Jun Park, Hong-Seok Choi, In-Keun Kim, Seung Min Yang, Sun-Yeol Kim, Jaemin Jang, Jinwook Kim, Seong-Hee Lee, Younghyun Jeon, Juhyung Park, Tae-Kyun Kim, Dongyoon Ka, Sanghoon Oh, Jinse Kim, Junyeol Jeon, Seonhong Kim, Kyeong Tae Kim, Taeho Kim, Hyeonjin Yang, Dongju Yang, Minseop Lee, Heewoong Song, Dongwook Jang, Junghyun Shin, Hyunsik Kim, Chang-Ki Baek, Hajun Jeong, Jongchan Yoon, Seung-Kyun Lim, Kyo Yun Lee, Young Jun Koo, Myeong-Jae Park, Joohwan Cho, Jonghwan Kim:
13.4 A 48GB 16-High 1280GB/s HBM3E DRAM with All-Around Power TSV and a 6-Phase RDQS Scheme for TSV Area Optimization. ISSCC 2024: 238-240 - [i1]Minseok Seo, Xuan Truong Nguyen, Seok Joong Hwang, Yongkee Kwon, Guhyun Kim, Chanwook Park, Ilkon Kim, Jaehan Park, Jeongbin Kim, Woojae Shin, Jongsoon Won, Haerang Choi, Kyuyoung Kim, Daehan Kwon, Chunseok Jeong, Sangheon Lee, Yongseok Choi, Wooseok Byun, Seungcheol Baek, Hyuk-Jae Lee, John Kim:
IANUS: Integrated Accelerator based on NPU-PIM Unified Memory System. CoRR abs/2410.15008 (2024) - 2023
- [j1]Dae-Han Kwon
A 1ynm 1.25V 8Gb 16Gb/s/Pin GDDR6-Based Accelerator-in-Memory Supporting 1TFLOPS MAC Operation and Various Activation Functions for Deep Learning Application. IEEE J. Solid State Circuits 58(1): 291-302 (2023) - [c10]Yongkee Kwon, Guhyun Kim, Nahsung Kim, Woojae Shin, Jongsoon Won, Hyunha Joo, Haerang Choi, Byeongju An, Gyeongcheol Shin, Dayeon Yun, Jeongbin Kim, Changhyun Kim, Ilkon Kim, Jaehan Park, Chanwook Park, Yosub Song, Byeongsu Yang, Hyeongdeok Lee, Seungyeong Park, Wonjun Lee, Seongju Lee, Kyuyoung Kim, Daehan Kwon, Chunseok Jeong, John Kim, Euicheol Lim, Junhyun Chun:
Memory-Centric Computing with SK Hynix's Domain-Specific Memory. HCS 2023: 1-26 - 2022
- [c9]Yongkee Kwon, Kornijcuk Vladimir, Nahsung Kim, Woojae Shin, Jongsoon Won, Minkyu Lee, Hyunha Joo, Haerang Choi, Guhyun Kim, Byeongju An, Jeongbin Kim
System Architecture and Software Stack for GDDR6-AiM. HCS 2022: 1-25 - [c8]Daeyong Shim, Chunseok Jeong, Euncheol Lee, Junmo Kang, Seokcheol Yoon, Yongkee Kwon, Il Park, Hyun Ahn, Seonyong Cha, Jinkook Kim:
Holistic approaches to memory solutions for the Autonomous Driving Era. ISCAS 2022: 351-355 - [c7]Seong Ju Lee, Kyu-Young Kim, Sanghoon Oh, Joonhong Park, Gimoon Hong, Dong Yoon Ka, Kyu-Dong Hwang, Jeongje Park, Kyeong Pil Kang, Jungyeon Kim, Junyeol Jeon, Nahsung Kim, Yongkee Kwon, Kornijcuk Vladimir, Woojae Shin, Jongsoon Won, Minkyu Lee, Hyunha Joo, Haerang Choi, Jaewook Lee, Donguc Ko, Younggun Jun, Keewon Cho, Ilwoong Kim, Choungki Song, Chunseok Jeong, Dae-Han Kwon, Jieun Jang, Il Park, Junhyun Chun, Joohwan Cho:
A 1ynm 1.25V 8Gb, 16Gb/s/pin GDDR6-based Accelerator-in-Memory supporting 1TFLOPS MAC Operation and Various Activation Functions for Deep-Learning Applications. ISSCC 2022: 1-3 - 2020
- [c6]Dong-Uk Lee, Ho Sung Cho, Jihwan Kim, Young Jun Ku, Sangmuk Oh, Chul Dae Kim, Hyun Woo Kim, Wooyoung Lee, Tae-Kyun Kim, Tae Sik Yun, Min Jeong Kim, SeungGyeon Lim, Seong Hee Lee, Byung Kuk Yun, Jun Il Moon, Ji Hwan Park, Seokwoo Choi, Young Jun Park, Chang Kwon Lee, Chunseok Jeong, Jae-Seung Lee, Sang Hun Lee, Woo Sung We, Jong Chan Yun, Doobock Lee, Junghyun Shin, Seungchan Kim, Junghwan Lee, Jiho Choi, Yucheon Ju, Myeong-Jae Park, Kang Seol Lee, Youngdo Hur, Daeyong Shim, Sangkwon Lee, Junhyun Chun, Kyowon Jin:
22.3 A 128Gb 8-High 512GB/s HBM2E DRAM with a Pseudo Quarter Bank Structure, Power Dispersion and an Instruction-Based At-Speed PMBIST. ISSCC 2020: 334-336 - [c5]Mingxuan He, Choungki Song, Ilkon Kim, Chunseok Jeong, Seho Kim, Il Park, Mithuna Thottethodi
Newton: A DRAM-maker's Accelerator-in-Memory (AiM) Architecture for Machine Learning. MICRO 2020: 372-385
2010 – 2019
- 2019
- [c4]Seong Ju Lee, Byung Deuk Jeon, Kyeong Pil Kang, Dong Yoon Ka, Na Yeon Kim, Yongseop Kim, Yunseok Hong, Mankeun Kang, Jinyong Min, Mingyu Lee, Chunseok Jeong, Kwandong Kim, Doobock Lee, Junghyun Shin, Yuntack Han, Youngbo Shim, Youngjoo Kim, Yongsun Kim, Hyunseok Kim, Jaewoong Yun, Byungsoo Kim, Seokhwan Han, Changwoo Lee, Junyong Song, Ho Uk Song, Il Park, Yongju Kim, Junhyun Chun, Jonghoon Oh:
A 512GB 1.1V Managed DRAM Solution with 16GB ODP and Media Controller. ISSCC 2019: 384-386 - 2018
- [c3]Jin-Hee Cho, Jihwan Kim, Wooyoung Lee, Dong-Uk Lee, Tae-Kyun Kim, Heat Bit Park, Chunseok Jeong, Myeong-Jae Park, Seung Geun Baek, Seokwoo Choi, Byung Kuk Yoon, Young Jae Choi, Kyo Yun Lee, Daeyong Shim, Jonghoon Oh, Jinkook Kim, Seok-Hee Lee:
A 1.2V 64Gb 341GB/S HBM2 stacked DRAM with spiral point-to-point TSV structure and improved bank group data control. ISSCC 2018: 208-210 - 2016
- [c2]Jong-Chern Lee, Jihwan Kim, Kyung Whan Kim, Young Jun Ku, Dae Suk Kim, Chunseok Jeong, Tae Sik Yun, Hongjung Kim, Ho Sung Cho, Sangmuk Oh, Hyun Sung Lee, Ki Hun Kwon, Dong Beom Lee, Young Jae Choi, Jaejin Lee, Hyeon Gon Kim, Jun Hyun Chun, Jonghoon Oh, Seok Hee Lee:
High bandwidth memory(HBM) with TSV technique. ISOCC 2016: 181-182 - [c1]Jong-Chern Lee, Jihwan Kim, Kyung Whan Kim, Young Jun Ku, Dae Suk Kim, Chunseok Jeong, Tae Sik Yun, Hongjung Kim, Ho Sung Cho, Yeon Ok Kim, Jae-Hwan Kim, Jin Ho Kim, Sangmuk Oh, Hyun Sung Lee, Ki Hun Kwon, Dong Beom Lee, Young Jae Choi, Jeajin Lee, Hyeon Gon Kim, Jun Hyun Chun, Jonghoon Oh, Seok Hee Lee:
18.3 A 1.2V 64Gb 8-channel 256GB/s HBM DRAM with peripheral-base-die architecture and small-swing technique on heavy load interface. ISSCC 2016: 318-319
Coauthor Index
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last updated on 2024-11-28 20:34 CET by the dblp team
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