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Devleena Ghosh
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2020 – today
- 2024
- [j4]Devleena Ghosh
, Chittaranjan Mandal
SMT based parameter identifiable combination detection for non-linear continuous and hybrid dynamics. Formal Aspects Comput. 36(3): 15:1-15:41 (2024) - [j3]Devleena Ghosh
MAB-BMC: A Formal Verification Enhancer by Harnessing Multiple BMC Engines Together. ACM Trans. Design Autom. Electr. Syst. 29(5): 1-37 (2024) - 2023
- [c4]Devleena Ghosh, Sumana Ghosh, Raj Kumar Gajavelly, Ansuman Banerjee:
Harnessing Multiple BMC Engines Together for Efficient Formal Verification. MEMOCODE 2023: 71-81 - 2022
- [j2]Devleena Ghosh
Clustering Based Parameter Estimation of Thyroid Hormone Pathway. IEEE ACM Trans. Comput. Biol. Bioinform. 19(1): 343-354 (2022) - 2021
- [j1]Arindam Das
Automatic Generation of Route Control Chart From Validated Signal Interlocking Plan. IEEE Trans. Intell. Transp. Syst. 22(10): 6516-6525 (2021)
2010 – 2019
- 2015
- [c3]Devleena Ghosh
Layout Validation Using Graph Grammar and Generation of Yard Specific Safety Properties for Railway Interlocking Verification. APSEC 2015: 330-337 - [c2]Gargi Roy, Devleena Ghosh
A Virtual Laboratory Package to Support Teaching of Logic Design and Computer Organization. T4E 2015: 3-6 - [c1]Gargi Roy, Devleena Ghosh
Aiding Teaching of Logic Design and Computer Organization through Dynamic Problem Generation and Automatic Checker Using COLDVL Tool. T4E 2015: 15-22
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last updated on 2024-12-23 19:30 CET by the dblp team
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