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Nima Honarmand
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2010 – 2019
- 2019
- [j2]Varun Agrawal
, Mina Abbasi Dinani
Massively Parallel Server Processors. IEEE Comput. Archit. Lett. 18(1): 75-78 (2019) - [c16]Meng Luo, Pierre Laperdrix, Nima Honarmand, Nick Nikiforakis:
Time Does Not Heal All Wounds: A Longitudinal Analysis of Security-Mechanism Support in Mobile Browsers. NDSS 2019 - 2018
- [c15]Yasser Shalabi, Mengjia Yan
Record-Replay Architecture as a General Security Framework. HPCA 2018: 180-193 - [c14]Shenghsun Cho, Amoghavarsha Suresh, Tapti Palit, Michael Ferdman, Nima Honarmand:
Taming the Killer Microsecond. MICRO 2018: 627-640 - 2017
- [c13]Meng Luo, Oleksii Starov, Nima Honarmand, Nick Nikiforakis:
Hindsight: Understanding the Evolution of UI Vulnerabilities in Mobile Browsers. CCS 2017: 149-162 - 2015
- [c12]Yuelu Duan, Nima Honarmand, Josep Torrellas:
Asymmetric Memory Fences: Optimizing Both Performance and Implementability. ASPLOS 2015: 531-543 - 2014
- [b1]Nima Honarmand:
Record and deterministic replay of parallel programs on multiprocessors. University of Illinois Urbana-Champaign, USA, 2014 - [c11]Nima Honarmand, Josep Torrellas:
RelaxReplay: record and replay for relaxed-consistency multiprocessors. ASPLOS 2014: 223-238 - [c10]Nima Honarmand, Josep Torrellas:
Replay debugging: Leveraging record and replay for program debugging. ISCA 2014: 445-456 - 2013
- [c9]Nima Honarmand, Nathan Dautenhahn, Josep Torrellas, Samuel T. King, Gilles Pokam, Cristiano Pereira:
Cyrus: unintrusive application-level record-replay for replay parallelism. ASPLOS 2013: 193-206 - [c8]Gilles Pokam, Klaus Danne, Cristiano Pereira, Rolf Kassa, Tim Kranich, Shiliang Hu, Justin Emile Gottschlich, Nima Honarmand, Nathan Dautenhahn, Samuel T. King, Josep Torrellas:
QuickRec: prototyping an intel architecture extension for record and replay of multithreaded programs. ISCA 2013: 643-654 - 2011
- [c7]Byn Choi, Rakesh Komuravelli, Hyojin Sung, Robert Smolinski, Nima Honarmand, Sarita V. Adve, Vikram S. Adve, Nicholas P. Carter, Ching-Tsun Chou:
DeNovo: Rethinking the Memory Hierarchy for Disciplined Parallelism. PACT 2011: 155-166 - [c6]Robert L. Bocchino Jr., Stephen Heumann, Nima Honarmand, Sarita V. Adve, Vikram S. Adve, Adam Welc, Tatiana Shpeisman:
Safe nondeterminism in a deterministic-by-default parallel language. POPL 2011: 535-548
2000 – 2009
- 2007
- [j1]Ali Shahabi, Nima Honarmand, Hasan Sohofi, Zainalabedin Navabi:
Degradable mesh-based on-chip networks using programmable routing tables. IEICE Electron. Express 4(10): 332-339 (2007) - [c5]Nima Honarmand, Hasan Sohofi, Maghsoud Abbaspour, Zainalabedin Navabi:
APDL: A Processor Description Language For Design Space Exploration of Embedded Processors. FDL 2007: 50-55 - [c4]Ali Shahabi, Nima Honarmand, Zainalabedin Navabi:
Programmable Routing Tables for Degradable Torus-Based Networks on Chips. ISCAS 2007: 1065-1068 - [c3]Nima Honarmand, Ali Shahabi, Hasan Sohofi, Maghsoud Abbaspour
High Level Synthesis of Degradable ASICs Using Virtual Binding. VTS 2007: 311-317 - 2006
- [c2]Nima Honarmand, Ali Afzali-Kusha:
Low Power Combinational Multipliers using Data-driven Signal Gating. APCCAS 2006: 1430-1433 - [c1]Nima Honarmand, M. Reza Javaheri, Naser Sedaghati-Mokhtari, Ali Afzali-Kusha:
Power efficient sequential multiplication using pre-computation. ISCAS 2006
Coauthor Index
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