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Konstantin Shibin
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2020 – today
- 2024
- [c8]Hardi Selg, Konstantin Shibin, Anton Tsertov, Maksim Jenihhin, Peeter Ellervee, Jaan Raik:
Special Session: In-Field ML-Assisted Intermittent Fault Localization and Management in RISC-V SoCs. DFT 2024: 1-6 - [c7]Maksim Jenihhin, Mahdi Taheri, Natalia Cherezova, Mohammad Hasan Ahmadilivani, Hardi Selg, Artur Jutman, Konstantin Shibin, Anton Tsertov, Sergei Devadze, Rama Mounika Kodamanchili, Ahsan Rafiq, Jaan Raik, Masoud Daneshtalab:
Keynote: Cost-Efficient Reliability for Edge-AI Chips. LATS 2024: 1-2 - 2023
- [c6]Konstantin Shibin, Maksim Jenihhin, Artur Jutman, Sergei Devadze, Anton Tsertov:
On-Chip Sensors Data Collection and Analysis for SoC Health Management. DFT 2023: 1-6 - [i1]Konstantin Shibin, Maksim Jenihhin, Artur Jutman, Sergei Devadze, Anton Tsertov:
On-Chip Sensors Data Collection and Analysis for SoC Health Management. CoRR abs/2308.15917 (2023)
2010 – 2019
- 2017
- [j3]Konstantin Shibin, Sergei Devadze, Artur Jutman, Martin Grabmann, Robin Pricken:
Health Management for Self-Aware SoCs Based on IEEE 1687 Infrastructure. IEEE Des. Test 34(6): 27-35 (2017) - 2016
- [j2]Igor Aleksejev, Sergei Devadze, Artur Jutman, Konstantin Shibin:
Optimization of Boundary Scan Tests Using FPGA-Based Efficient Scan Architectures. J. Electron. Test. 32(3): 245-255 (2016) - [c5]Gadi Aleksandrowicz, Eli Arbel, Roderick Bloem, Timon D. ter Braak, Sergei Devadze, Görschwin Fey, Maksim Jenihhin, Artur Jutman, Hans G. Kerkhoff, Robert Könighofer, Jan Malburg, Shiri Moran, Jaan Raik, Gerard K. Rauwerda, Heinz Riener, Franz Röck, Konstantin Shibin, Kim Sunesen, Jinbo Wan, Yong Zhao:
Designing reliable cyber-physical systems overview associated to the special session at FDL'16. FDL 2016: 1-8 - [c4]Konstantin Shibin, Sergei Devadze, Artur Jutman:
On-line fault classification and handling in IEEE1687 based fault management system for complex SoCs. LATS 2016: 69-74 - 2015
- [c3]Konstantin Shibin, Vivek Chickermane, Brion L. Keller, Christos Papameletis, Erik Jan Marinissen:
At-Speed Testing of Inter-Die Connections of 3D-SICs in the Presence of Shore Logic. ATS 2015: 79-84 - [c2]Igor Aleksejev, Sergei Devadze, Artur Jutman, Konstantin Shibin:
Virtual reconfigurable scan-chains on FPGAs for optimized board test. LATS 2015: 1-6 - 2014
- [c1]Konstantin Shibin, Sergei Devadze, Artur Jutman:
Asynchronous Fault Detection in IEEE P1687 Instrument Network. NATW 2014: 73-78 - 2013
- [j1]Artur Jutman, Sergei Devadze, Konstantin Shibin:
Effective Scalable IEEE 1687 Instrumentation Network for Fault Management. IEEE Des. Test 30(5): 26-35 (2013)
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