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Surya Bhattacharya
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2020 – today
- 2024
- [c4]Xin Li, Sajay B. N. Gourikutty, Jiaqi Wu, Teck Guan Lim, Pengfei Guo, Jaye C. Davies, Sing-Chee Koh, Lau Boon Long, Ming Chinq Jong, Chao Li, Guo-Qiang Lo, Surya Bhattacharya, Tsung-Yang Liow:
1.6 Tbps (224 Gbps/λ) Silicon Photonic Engine Fabricated with Advanced Electronic-Photonic FOWLP for Co-Packaged Optics and Linear Drive Applications. OFC 2024: 1-3 - 2023
- [c3]Surya Bhattacharya, Vempati Srinivasa Rao:
Multi-Chiplet Heterogeneous Integration Packaging for Semiconductor System Scaling. VLSI Technology and Circuits 2023: 1-4 - 2022
- [c2]Teyuh Chou, Wei Tang, Mihai D. Rotaru, Chester Liu, Rahul Dutta, Sharon Lim Pei Siang, David Ho Soon Wee, Surya Bhattacharya, Zhengya Zhang:
NetFlex: A 22nm Multi-Chiplet Perception Accelerator in High-Density Fan-Out Wafer-Level Packaging. VLSI Technology and Circuits 2022: 208-209
2010 – 2019
- 2015
- [j1]Guruprasad Katti, S. W. Ho, Li Hong Yu, Songbai Zhang, Rahul Dutta, Roshan Weerasekera, Ka-Fai Chang, Jong-Kai Lin, Srinivasa Rao Vempati, Surya Bhattacharya:
Fabrication and Assembly of Cu-RDL-Based 2.5-D Low-Cost Through Silicon Interposer (LC-TSI). IEEE Des. Test 32(4): 23-31 (2015) - 2011
- [c1]Joseph Romen Cubillo, Roshan Weerasekera, Zaw Zaw Oo, En-Xiao Liu, Bob Conn, Surya Bhattacharya, Robert Patti:
Interconnect design and analysis for Through Silicon Interposers (TSIs). 3DIC 2011: 1-6
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last updated on 2024-06-07 19:10 CEST by the dblp team
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