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Atsushi Fujiwara
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2020 – today
- 2020
- [c5]Yuri Kato, Yoshihisa Matoba, Katsumi Honda, Koji Ogawa, Kan Shimizu, Masataka Maehara, Atsushi Fujiwara, Aoi Odawara, Chigusa Yamane, Naohiko Kimizuka, Jun Ogi, Tadayuki Taura, Ikuro Suzuki, Yusuke Oike:
High-Density and Large-Scale MEA System Featuring 236, 880 Electrodes at 11.72μm Pitch for Neuronal Network Analysis. VLSI Circuits 2020: 1-2
2000 – 2009
- 2006
- [c4]Akira Yamada, Atsushi Fujiwara, L. Lily Yang, Bahareh Sadeghi:
EDCA Based Congestion Control for WLAN Mesh Networks. VTC Spring 2006: 1288-1292 - [c3]Bahareh Sadeghi, Akira Yamada, Atsushi Fujiwara, L. Lily Yang:
A simple and efficient hop-by-hop congestion control protocol for wireless mesh networks. WICON 2006: 4 - 2005
- [j4]Atsushi Fujiwara, Yoichi Matsumoto:
Centralized Channel Allocation Technique to Alleviate Exposed Terminal Problem in CSMA/CA-Based Mesh Networks - Solution Employing Chromatic Graph Approach - . IEICE Trans. Commun. 88-B(3): 958-964 (2005) - [j3]Atsushi Fujiwara, Shinji Takeda, Hitoshi Yoshino, Narumi Umeda:
Evaluation of Cell Coverage and System Throughput in Multihop DS-CDMA Cellular Network. IEICE Trans. Commun. 88-B(9): 3541-3545 (2005) - 2002
- [j2]Mitsuru Hiraki, Takayasu Ito, Atsushi Fujiwara, Taichi Ohashi, Tetsuro Hamano, Takaaki Noda:
A 63-μW standby power microcontroller with on-chip hybrid regulator scheme. IEEE J. Solid State Circuits 37(5): 605-611 (2002) - [c2]Yasushi Yamao, Toru Otsu, Atsushi Fujiwara, Hidekazu Murata, Susumu Yoshida:
Multi-hop radio access cellular concept for fourth-generation mobile communications system. PIMRC 2002: 59-63
1990 – 1999
- 1997
- [c1]Toshiham Matsukuma, Atsushi Fujiwara, Munehiro Namba, Yoshihisa Ishida:
Non-linear PID controller using neural networks. ICNN 1997: 811-814 - 1993
- [j1]Michihiro Inoue, Toshio Yamada, Atsushi Fujiwara:
A New Testing Acceleration Chip for Low-Cost Memory Tests. IEEE Des. Test Comput. 10(1): 15-19 (1993)
Coauthor Index
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