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Alexander Fish
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2020 – today
- 2024
- [j53]Eldar Cohen
, Leonid Yavits
CoNfasTT: A Configurable, Scalable, and Fast Dual Mode Logic-Based NTT Design. IEEE Access 12: 150486-150501 (2024) - [j52]Itay Merlin
DIPER: Detection and Identification of Pathogens Using Edit Distance-Tolerant Resistive CAM. IEEE Trans. Computers 73(10): 2463-2473 (2024) - [j51]Alexandra L. Zimpeck
Guest Editorial Special Issue on the IEEE Latin American Symposium on Circuits and Systems (LASCAS 2023). IEEE Trans. Circuits Syst. I Regul. Pap. 71(3): 985-986 (2024) - [j50]Inbal Stanger
Revisiting Dynamic Logic - A True Candidate for Energy-Efficient Cryogenic Operation in Nanoscaled Technologies. IEEE Trans. Circuits Syst. I Regul. Pap. 71(3): 987-999 (2024) - [c58]Yehuda Kra, Yehuda Rudin, Alexander Fish, Adam Teman:
Basecalling by Statistical Profiling and Hardware-Accelerated Convolutional Neural Network. PRIME 2024: 1-4 - [c57]Noam Roknian, Yonatan Shoshan, Inbal Stanger, Menachem Goldzweig, Yoav Weizmann, Adam Teman, Edoardo Charbon, Alexander Fish:
Methodologies for Device Characterization in Cryogenic Temperatures. PRIME 2024: 1-4 - [c56]Netanel Shavit, Inbal Stanger, Ramiro Taco, Leonid Yavits, Alexander Fish:
Low Power, Energy Efficient and High Performance Triple Mode Logic for IoT Applications. PRIME 2024: 1-4 - 2023
- [j49]Yaron H. Cohen
Toward a Monolithic Pixel Sensor for Heavy Ion Spectroscopy - Pixel Structure Design and Optimization. IEEE Access 11: 18620-18630 (2023) - [j48]Netanel Shavit
Programmable All-in-One 4×8-/2×16-/1×32-Bits Dual Mode Logic Multiplier in 16 nm FinFET With Semi-Automatic Flow. IEEE Access 11: 116206-116218 (2023) - [j47]David Zooker
Silicon Proven 1.29 μm × 1.8 μm 65nm Sub-Vt Optical Sensor for Hardware Security Applications. IEEE Access 11: 136269-136278 (2023) - [c55]Noam Roknian
Overview of Cryogenic Operation in Nanoscale Technology Nodes. LASCAS 2023: 1-4 - [i7]Andrada Muntean, Yonatan Shoshan, Slava Yuzhaninov, Emanuele Ripiccini, Claudio Bruschini
On-chip fully reconfigurable Artificial Neural Network in 16 nm FinFET for Positron Emission Tomography. CoRR abs/2302.08291 (2023) - 2022
- [j46]Yizhak Shifman
A Method for Mitigation of Droop Timing Errors Including a 500 MHz Droop Detector and Dual Mode Logic. IEEE J. Solid State Circuits 57(2): 596-608 (2022) - [c54]Inbal Stanger, Noam Roknian
Evaluation of Dual Mode Logic Under Cryogenic Temperatures. ISCAS 2022: 361-364 - [c53]Yizhak Shifman, Alexander Fish, Joseph Shor:
MirrorN PUF: Harvesting Multiple Independent Bits From Each PUF Cell in 65nm. ISCAS 2022: 2418-2422 - 2021
- [j45]Yoav Weizman, Robert Giterman
Low-Cost Side-Channel Secure Standard 6T-SRAM-Based Memory With a 1% Area and Less Than 5% Latency and Power Overheads. IEEE Access 9: 91764-91776 (2021) - [c52]Netanel Shavit, Inbal Stanger, Ramiro Taco
Live Demonstration: A 0.8V, 1.54 pJ / 940 MHz Dual Mode Logic-Based 16x16-Bit Booth Multiplier in 16-nm FinFET. ISCAS 2021: 1 - [c51]Inbal Stanger, Netanel Shavit, Ramiro Taco
Live Demo: Silicon Evaluation of Multimode Dual Mode Logic for PVT-Aware Datapaths. ISCAS 2021: 1 - 2020
- [j44]Inbal Stanger
Silicon Evaluation of Multimode Dual Mode Logic for PVT-Aware Datapaths. IEEE Trans. Circuits Syst. II Express Briefs 67-II(9): 1639-1643 (2020) - [c50]Matan Assaf, Odem Harel, Erez Tadmor, Orly Yadid-Pecht, Alexander Fish:
Weight Based Current Assisted Photonic Demodulator (WBCAPD) - Expansion towards Neuromorphic Applications. ISCAS 2020: 1-5 - [c49]Inbal Stanger, Netanel Shavit, Ramiro Taco, Leonid Yavits, Marco Lanuzza, Alexander Fish:
Robust Dual Mode Pass Logic (DMPL) for Energy Efficiency and High Performance. ISCAS 2020: 1-5 - [c48]Ramiro Taco, Leonid Yavits, Netanel Shavit, Inbal Stanger, Marco Lanuzza, Alexander Fish:
Exploiting Single-Well Design for Energy-Efficient Ultra-Wide Voltage Range Dual Mode Logic-Based Digital Circuits in 28nm FD-SOI Technology. ISCAS 2020: 1-5 - [c47]Leonid Yavits, Ramiro Taco, Netanel Shavit, Inbal Stanger, Alexander Fish:
Dual Mode Logic Address Decoder. ISCAS 2020: 1-5 - [c46]David Zooker Zabib, Matan Elkoni, Or Ohev Shalom, Yoav Weizman, Itamar Levi, Osnat Keren, Alexander Fish:
Temporal Power Redistribution as a Countermeasure against Side-Channel Attacks. ISCAS 2020: 1-5
2010 – 2019
- 2019
- [j43]Ramiro Taco
An 88-fJ/40-MHz [0.4 V]-0.61-pJ/1-GHz [0.9 V] Dual-Mode Logic 8 × 8 bit Multiplier Accumulator With a Self-Adjustment Mechanism in 28-nm FD-SOI. IEEE J. Solid State Circuits 54(2): 560-568 (2019) - [j42]Robert Giterman
A 7T Security Oriented SRAM Bitcell. IEEE Trans. Circuits Syst. II Express Briefs 66-II(8): 1396-1400 (2019) - [j41]David Zooker Zabib
Silicon Proven 1.8 µm × 9.2 µm 65-nm Digital Bit Generator for Hardware Security Applications. IEEE Trans. Circuits Syst. II Express Briefs 66-II(10): 1713-1717 (2019) - [c45]Robert Giterman, Maoz Wicentowski, Oron Chertkow, Ilan Sever, Ishai Kehati, Yoav Weizman, Osnat Keren, Alexander Fish
Power Analysis Resilient SRAM Design Implemented with a 1% Area Overhead Impedance Randomization Unit for Security Applications. ESSCIRC 2019: 69-72 - [c44]Yizhak Shifman
An SRAM PUF with 2 Independent Bits/Cell in 65nm. ISCAS 2019: 1-5 - [c43]Ramiro Taco
Live Demo: An 88fJ / 40 MHz [0.4V] - 0.61pJ / 1GHz [0.9V] Dual Mode Logic 8×8-Bit Multiplier Accumulator with a Self-Adjustment Mechanism in 28 nm FD-SOI. ISCAS 2019: 1 - [c42]Yehuda Rudin, Itamar Levi, Alexander Fish
FPGA Implementation of pAsynch Design Paradigm. NTMS 2019: 1-5 - [c41]David Zooker Zabib, Alexander Fish
Compact Sub-Vt Optical Sensor for the Detection of Fault Injection in Hardware Security Applications. NTMS 2019: 1-5 - 2018
- [j40]Robert Giterman
An 800-MHz Mixed- VT 4T IFGC Embedded DRAM in 28-nm CMOS Bulk Process for Approximate Storage Applications. IEEE J. Solid State Circuits 53(7): 2136-2148 (2018) - [j39]Anatoli Mordakhay
A Low Noise Low Offset Readout Circuit for Magnetic-Random-Access-Memory. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(4): 1224-1233 (2018) - [j38]Robert Giterman
A 4-Transistor nMOS-Only Logic-Compatible Gain-Cell Embedded DRAM With Over 1.6-ms Retention Time at 700 mV in 28-nm FD-SOI. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(4): 1245-1256 (2018) - [j37]Itamar Levi
Low-Cost Pseudoasynchronous Circuit Design Style With Reduced Exploitable Side Information. IEEE Trans. Very Large Scale Integr. Syst. 26(1): 82-95 (2018) - [j36]Robert Giterman
Leakage Power Attack-Resilient Symmetrical 8T SRAM Cell. IEEE Trans. Very Large Scale Integr. Syst. 26(10): 2180-2184 (2018) - [c40]Moshe Avital, Anatoli Mordakhay, David Zooker Zabib, Yoav Weizman, Alexander Fish
Utilization of Process and Supply Voltage Random Variations for Random Bit Generation. APCCAS 2018: 317-320 - [c39]Itamar Levi, Yehuda Rudin, Alexander Fish
Embedded randomness and data dependencies design paradigm: Advantages and challenges. DATE 2018: 395-400 - [c38]Robert Giterman, Roman Golman, Amir Shalom, Or Maltabashi, Alexander Fish
Live Demonstration: An 800 Mhz Gain-Cell Embedded DRAM in 28 nm CMOS Bulk Process for Approximate Computing Applications. ISCAS 2018: 1- - [i6]Maxime Bombar, Alexander Fish:
Delocalisation of one-dimensional marginals of product measures and the capacity of LTI discrete channels. CoRR abs/1809.00459 (2018) - 2017
- [j35]Itamar Levi
A Survey of the Sensitivities of Security Oriented Flip-Flop Circuits. IEEE Access 5: 24797-24809 (2017) - [j34]Itamar Levi
CPA Secured Data-Dependent Delay-Assignment Methodology. IEEE Trans. Very Large Scale Integr. Syst. 25(2): 608-620 (2017) - [j33]Amit Kazimirsky, Adam Teman
A 0.65-V, 500-MHz Integrated Dynamic and Static RAM for Error Tolerant Applications. IEEE Trans. Very Large Scale Integr. Syst. 25(9): 2411-2418 (2017) - [c37]Robert Giterman
An 800 Mhz mixed-VT 4T gain-cell embedded DRAM in 28 nm CMOS bulk process for approximate computing applications. ESSCIRC 2017: 308-311 - [c36]David Zooker Zabib, Maoz Vizentovski, Alexander Fish
Vulnerability of secured IoT memory against localized back side laser fault injection. EST 2017: 7-11 - [c35]Ramiro Taco
Evaluation of Dual Mode Logic in 28nm FD-SOI technology. ISCAS 2017: 1-4 - [c34]Yonatan Shoshan, Slava Yuzhaninov, Noa Edri, Shay Harari, Yehuda Rudin, Yoav Weizman, Itai Nadler, Nir Rosenberg, Benjamin Flom, Dotan Bechor, Gilad Morag, Evgeny Grigoriants, Naftaly Blum, Ronen Daly, Maya Reuveni, Alexander Fish
A SoC platform for emerging technologies. ISOCC 2017: 306-307 - 2016
- [j32]Lior Moyal, Itamar Levi, Adam Teman
Synthesis of Dual Mode Logic. Integr. 55: 246-253 (2016) - [j31]Noa Edri, Pascal Meinerzhagen, Adam Teman
Silicon-Proven, Per-Cell Retention Time Distribution Model for Gain-Cell Based eDRAMs. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(2): 222-232 (2016) - [j30]Moshe Avital
CMOS Based Gates for Blurring Power Information. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(7): 1033-1042 (2016) - [j29]Robert Giterman
Single-Supply 3T Gain-Cell for Low-Voltage Low-Power Applications. IEEE Trans. Very Large Scale Integr. Syst. 24(1): 358-362 (2016) - [j28]Lior Atias, Adam Teman
A Low-Voltage Radiation-Hardened 13T SRAM Bitcell for Ultralow Power Space Applications. IEEE Trans. Very Large Scale Integr. Syst. 24(8): 2622-2633 (2016) - [c33]Ramiro Taco
Extended exploration of low granularity back biasing control in 28nm UTBB FD-SOI technology. ISCAS 2016: 41-44 - [c32]Robert Giterman
A process compensated gain cell embedded-DRAM for ultra-low-power variation-aware design. ISCAS 2016: 1006-1009 - 2015
- [j27]Viacheslav Yuzhaninov, Itamar Levi, Alexander Fish
Design Flow and Characterization Methodology for Dual Mode Logic. IEEE Access 3: 3089-3101 (2015) - [j26]Moshe Avital, Hadar Dagan, Itamar Levi, Osnat Keren, Alexander Fish
DPA-Secured Quasi-Adiabatic Logic (SQAL) for Low-Power Passive RFID Tags Employing S-Boxes. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(1): 149-156 (2015) - [j25]Itamar Levi, Osnat Keren, Alexander Fish
Data-Dependent Delays as a Barrier Against Power Attacks. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(8): 2069-2078 (2015) - [j24]Moshe Avital, Hadar Dagan, Osnat Keren, Alexander Fish
Randomized Multitopology Logic Against Differential Power Analysis. IEEE Trans. Very Large Scale Integr. Syst. 23(4): 702-711 (2015) - 2014
- [j23]Arkadiy Morgenshtein, Viacheslav Yuzhaninov, Alexey Kovshilovsky, Alexander Fish
Full-Swing Gate Diffusion Input logic - Case-study of low-power CLA adder design. Integr. 47(1): 62-70 (2014) - [j22]Hadar Dagan, Aviv Shapira, Adam Teman
A Low-Power Low-Cost 24 GHz RFID Tag With a C-Flash Based Embedded Memory. IEEE J. Solid State Circuits 49(9): 1942-1957 (2014) - [j21]Adam Teman
Replica Technique for Adaptive Refresh Timing of Gain-Cell-Embedded DRAM. IEEE Trans. Circuits Syst. II Express Briefs 61-II(4): 259-263 (2014) - [j20]Itamar Levi, Amir Albeck, Alexander Fish
A Low Energy and High Performance ${\rm DM}^{2}$ Adder. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(11): 3175-3183 (2014) - [j19]Itamar Levi, Alexander Belenky, Alexander Fish
Logical Effort for CMOS-Based Dual Mode Logic Gates. IEEE Trans. Very Large Scale Integr. Syst. 22(5): 1042-1053 (2014) - [c31]Moshe Avital, Alexander Fish
Secured Dual Mode Logic (DML) as a countermeasure against Differential Power Analysis. ISCAS 2014: 810-813 - [c30]Robert Giterman
4T Gain-Cell with internal-feedback for ultra-low retention power at scaled CMOS nodes. ISCAS 2014: 2177-2180 - [c29]Alexander Fish
Performance estimates of the pseudo-random method for radar detection. ISIT 2014: 3102-3106 - [i5]Alexander Fish, Shamgar Gurevich:
Performance Estimates of the Pseudo-Random Method for Radar Detection. CoRR abs/1404.6862 (2014) - 2013
- [j18]Itamar Levi, Alexander Fish
Dual Mode Logic - Design for Energy Efficiency and High Performance. IEEE Access 1: 258-265 (2013) - [j17]Hadar Dagan, Adam Teman
A Low-Power DCVSL-Like GIDL-Free Voltage Driver for Low-Cost RFID Nonvolatile Memory. IEEE J. Solid State Circuits 48(6): 1497-1510 (2013) - [j16]Adam Teman
Functionality and stability analysis of a 400 mV quasi-static RAM (QSRAM) bitcell. Microelectron. J. 44(3): 236-247 (2013) - [j15]Itamar Levi, Asaf Kaizerman, Alexander Fish
Low voltage dual mode logic: Model analysis and parameter extraction. Microelectron. J. 44(6): 553-560 (2013) - [j14]Sonjoy Deb Roy, Xin Li, Yonatan Shoshan, Alexander Fish
Hardware Implementation of a Digital Watermarking System for Video Authentication. IEEE Trans. Circuits Syst. Video Technol. 23(2): 289-301 (2013) - [j13]Alexander Fish
Delay-Doppler Channel Estimation in Almost Linear Complexity. IEEE Trans. Inf. Theory 59(11): 7632-7644 (2013) - [j12]Asaf Kaizerman, Sagi Fisher, Alexander Fish
Subthreshold Dual Mode Logic. IEEE Trans. Very Large Scale Integr. Syst. 21(5): 979-983 (2013) - [j11]Natan Krihely, Sam Ben-Yaakov
Efficiency Optimization of a Step-Down Switched Capacitor Converter for Subthreshold. IEEE Trans. Very Large Scale Integr. Syst. 21(12): 2353-2357 (2013) - [c28]Alexander Fish
The Incidence and Cross methods for efficient radar detection. Allerton 2013: 1059-1066 - [i4]Alexander Fish, Shamgar Gurevich:
The Incidence and Cross Methods for Efficient Radar Detection. CoRR abs/1309.3720 (2013) - [i3]Alexander Fish, Shamgar Gurevich:
Almost Linear Complexity Methods for Delay-Doppler Channel Estimation. CoRR abs/1309.6036 (2013) - 2012
- [j10]Arthur Spivak, Adam Teman
Low-Voltage 96 dB Snapshot CMOS Image Sensor with 4.5 nW Power Dissipation per Pixel. Sensors 12(8): 10067-10085 (2012) - [j9]Adam Teman
A 40-nm Sub-Threshold 5T SRAM Bit Cell With Improved Read and Write Stability. IEEE Trans. Circuits Syst. II Express Briefs 59-II(12): 873-877 (2012) - [c27]Hadar Dagan, Adam Teman
A GIDL free tunneling gate driver for a low power non-volatile memory array. ISCAS 2012: 452-455 - [c26]Janna Mezhibovsky, Adam Teman
State space modeling for sub-threshold SRAM stability analysis. ISCAS 2012: 1823-1826 - [c25]Hadar Dagan, Adam Teman
A low-cost low-power non-volatile memory for RFID applications. ISCAS 2012: 1827-1830 - [c24]Itamar Levi, Ori Bass, Asaf Kaizerman, Alexander Belenky, Alexander Fish
High speed Dual Mode Logic Carry Look Ahead Adder. ISCAS 2012: 3037-3040 - [c23]Alexander Fish
Delay-Doppler channel estimation with almost linear complexity: To Solomon Golomb for the occasion of his 80 birthday mazel tov. ISIT 2012: 2386-2390 - [i2]Alexander Fish, Shamgar Gurevich, Ronny Hadani, Akbar M. Sayeed, Oded Schwartz:
Delay-Doppler Channel Estimation with Almost Linear Complexity. CoRR abs/1208.4405 (2012) - 2011
- [j8]Adam Teman
A 250 mV 8 kb 40 nm Ultra-Low Power 9T Supply Feedback SRAM (SF-SRAM). IEEE J. Solid State Circuits 46(11): 2713-2726 (2011) - [j7]Arthur Spivak, Alexander Belenky, Alexander Fish
A Wide-Dynamic-Range CMOS Image Sensor With Gating for Night Vision Systems. IEEE Trans. Circuits Syst. II Express Briefs 58-II(2): 85-89 (2011) - [c22]Sagi Fisher, Raz Dagan, Sagi Blonder, Alexander Fish
An improved model for delay/energy estimation in near-threshold flip-flops. ISCAS 2011: 1065-1068 - [c21]Janna Mezhibovsky, Adam Teman
Low voltage SRAMs and the scalability of the 9T Supply Feedback SRAM. SoCC 2011: 136-141 - [i1]Alexander Fish, Shamgar Gurevich, Ronny Hadani, Akbar M. Sayeed, Oded Schwartz:
Computing the Matched Filter in Linear Time. CoRR abs/1112.4883 (2011)
2000 – 2009
- 2009
- [c20]Sagi Fisher, Adam Teman
Ultra-low Power Subthreshold Flip-flop Design. ISCAS 2009: 1573-1576 - 2008
- [j6]Marianna Beiderman, Terence Tam, Alexander Fish
A Low-Light CMOS Contact Imager With an Emission Filter for Biosensing Applications. IEEE Trans. Biomed. Circuits Syst. 2(3): 193-203 (2008) - [c19]Yonatan Shoshan, Alexander Fish
Hardware implementation of a DCT watermark for CMOS image sensors. ICECS 2008: 368-371 - [c18]Xin Li, Yonatan Shoshan, Alexander Fish
A simplified approach for designing secure Random Number Generators in HW. ICECS 2008: 372-375 - [c17]Marianna Beiderman, Terence Tam, Alexander Fish
A Low noise CMOS image sensor with an emission filter for fluorescence applications. ISCAS 2008: 1100-1103 - [c16]Alexander Fish
Low-power "Smart" CMOS image sensors. ISCAS 2008: 1408-1411 - [c15]Adam Teman
Autonomous CMOS image sensor for real time target detection and tracking. ISCAS 2008: 2138-2141 - 2007
- [j5]Alexander Belenky, Alexander Fish
Global Shutter CMOS Image Sensor With Wide Dynamic Range. IEEE Trans. Circuits Syst. II Express Briefs 54-II(12): 1032-1036 (2007) - [c14]Alexander Fish
Low Power CMOS Image Sensors Employing Adaptive Bulk Biasing Control (AB2C) Approach. ISCAS 2007: 2834-2837 - 2006
- [j4]Alexander Fish
CMOS Image Sensors With Self-Powered Generation Capability. IEEE Trans. Circuits Syst. II Express Briefs 53-II(11): 1210-1214 (2006) - [c13]Alexander Belenky, Alexander Fish
Global Shutter CMOS Image Sensor With Wide Dynamic Range. ICECS 2006: 314-317 - 2005
- [j3]Alexander Fish
High-speed and high-precision current winner-take-all circuit. IEEE Trans. Circuits Syst. II Express Briefs 52-II(3): 131-135 (2005) - [j2]Alexander Fish
Wide dynamic range snapshot APS for ultra low-power applications. IEEE Trans. Circuits Syst. II Express Briefs 52-II(11): 729-733 (2005) - [c12]Alexander Fish
Low-power global/rolling shutter image sensors in silicon on sapphire technology. ISCAS (1) 2005: 580-583 - [c11]Alexander Fish
Self-powered active pixel sensors for ultra low-power applications. ISCAS (5) 2005: 5310-5313 - 2004
- [c10]Alexander Fish, Alexander Belenky, Orly Yadid-Pecht:
Low power global shutter CMOS active pixel image sensor with ultra-high dynamic range. ICECS 2004: 149-152 - [c9]Alexander Fish, Vadim Milrud, Orly Yadid-Pecht:
High speed and high resolution current loser-take-all circuit of O(N) complexity. ICECS 2004: 234-237 - [c8]Alexander Fish, Aleksander Spivakovsky, Alexander Golberg, Orly Yadid-Pecht:
VLSI sensor for multiple targets detection and tracking. ICECS 2004: 543-546 - [c7]Alexander Fish, Vladislav Mosheyev, Vitali Linkovsky, Orly Yadid-Pecht:
Ultra low-power DFF based shift registers design for CMOS image sensors applications. ICECS 2004: 658-661 - [c6]Alexander Belenky, Alexander Fish, Shy Hamami, Vadim Milrud, Orly Yadid-Pecht:
Widening the dynamic range of the readout integration circuit for uncooled microbolometer infrared sensors. ISCAS (5) 2004: 600-603 - [c5]Arkadiy Morgenshtein, Alexander Fish, Israel A. Wagner:
An efficient implementation of D-Flip-Flop using the GDI technique. ISCAS (2) 2004: 673-676 - [c4]Alexander Fish, Vadim Milrud, Orly Yadid-Pecht:
High speed and high resolution current winner-take-all circuit in conjunction with adaptive thresholding. ISCAS (4) 2004: 852-855 - 2003
- [c3]Alexander Fish, Dmitry Akselrod, Orly Yadid-Pecht:
An adaptive center of mass detection system employing a 2-D dynamic element matching algorithm for object tracking. ISCAS (3) 2003: 778-781 - 2002
- [j1]Arkadiy Morgenshtein, Alexander Fish
Gate-diffusion input (GDI): a power-efficient method for digital combinatorial circuits. IEEE Trans. Very Large Scale Integr. Syst. 10(5): 566-581 (2002) - [c2]Arkadiy Morgenshtein, Alexander Fish
Gate-diffusion input (GDI) - a technique for low power design of digital circuits: analysis and characterization. ISCAS (1) 2002: 477-480 - 2001
- [c1]Alexander Fish
CMOS current/voltage mode winner-take-all circuit with spatial filtering. ISCAS (3) 2001: 636-639
Coauthor Index
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