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Divya Arora 0001
Person information
- affiliation: Apple Inc., USA
- affiliation (former): Intel Corporation, USA
- affiliation (PhD 2007): Princeton University, USA
Other persons with the same name
- Divya Arora 0002 — Indira Gandhi Delhi Technical University for Women, Delhi, India
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2010 – 2019
- 2019
- [i1]Divya Arora, Ilia Polian, Francesco Regazzoni, Patrick Schaumont:
Secure Composition for Hardware Systems (Dagstuhl Seminar 19301). Dagstuhl Reports 9(7): 94-116 (2019) - 2014
- [c5]Pramod Subramanyan, Divya Arora:
Formal verification of taint-propagation security properties in a commercial SoC design. DATE 2014: 1-2 - 2012
- [j4]Divya Arora, Najwa Aaraj, Anand Raghunathan, Niraj K. Jha:
INVISIOS: A Lightweight, Minimally Intrusive Secure Execution Environment. ACM Trans. Embed. Comput. Syst. 11(3): 60:1-60:20 (2012)
2000 – 2009
- 2007
- [j3]Divya Arora, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha:
Architectural Support for Run-Time Validation of Program Data Properties. IEEE Trans. Very Large Scale Integr. Syst. 15(5): 546-559 (2007) - [j2]Divya Arora, Anand Raghunathan, Srivaths Ravi, Murugan Sankaradass, Niraj K. Jha, Srimat T. Chakradhar:
Exploring Software Partitions for Fast Security Processing on a Multiprocessor Mobile SoC. IEEE Trans. Very Large Scale Integr. Syst. 15(6): 699-710 (2007) - 2006
- [j1]Divya Arora, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha:
Hardware-Assisted Run-Time Monitoring for Secure Program Execution on Embedded Processors. IEEE Trans. Very Large Scale Integr. Syst. 14(12): 1295-1308 (2006) - [c4]Divya Arora, Anand Raghunathan, Srivaths Ravi, Niraj K. Jha:
Architectural support for safe software execution on embedded processors. CODES+ISSS 2006: 106-111 - [c3]Divya Arora, Anand Raghunathan, Srivaths Ravi, Murugan Sankaradass, Niraj K. Jha, Srimat T. Chakradhar:
Software architecture exploration for high-performance security processing on a multiprocessor mobile SoC. DAC 2006: 496-501 - 2005
- [c2]Divya Arora, Anand Raghunathan, Srivaths Ravi, Niraj K. Jha:
Enhancing security through hardware-assisted run-time validation of program data properties. CODES+ISSS 2005: 190-195 - [c1]Divya Arora, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha:
Secure Embedded Processing through Hardware-Assisted Run-Time Monitoring. DATE 2005: 178-183
Coauthor Index
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