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Yu-Hsiang Kao
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2010 – 2019
- 2016
- [c5]Yi-Hsiang Chen, Nae-Chyun Chen, Yu-Hsiang Kao, Yu-Cheng Li, Yi-Chang Lu:
Queue-based segmentation algorithm for refining depth maps in light field camera applications. GCCE 2016: 1-2 - [c4]Yu-Hsiang Kao, Sheng-Jui Huang, Yi-Chang Lu:
An iterative re-weighted least squares processor design for deblurring parabolic camera images. GCCE 2016: 1-2 - 2014
- [j2]Yu-Hsiang Kao, H. Jonathan Chao:
Design of a Bufferless Photonic Clos Network-on-Chip Architecture. IEEE Trans. Computers 63(3): 764-776 (2014) - 2011
- [j1]Yu-Hsiang Kao, Ming Yang, N. Sertac Artan, H. Jonathan Chao:
CNoC: High-Radix Clos Network-on-Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(12): 1897-1910 (2011) - [c3]Yu-Hsiang Kao, H. Jonathan Chao:
BLOCON: A Bufferless Photonic Clos network-on-chip architecture. NOCS 2011: 81-88 - 2010
- [c2]Yu-Hsiang Kao, Najla Alfaraj, Ming Yang, H. Jonathan Chao:
Design of High-Radix Clos Network-on-Chip. NOCS 2010: 181-188
2000 – 2009
- 2008
- [c1]Chih-Hui Ting, Juinn-Dar Huang, Yu-Hsiang Kao:
Cycle-time-aware sequential way-access set-associative cache for low energy consumption. APCCAS 2008: 854-857
Coauthor Index
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