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Andrew Putnam
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2020 – today
- 2024
- [e1]Zhiru Zhang, Andrew Putnam:
Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2024, Monterey, CA, USA, March 3-5, 2024. ACM 2024 [contents] - 2020
- [c21]Andrew Putnam
:
What To Do With Datacenter FPGAs Besides Deep Learning. FPGA 2020: 26
2010 – 2019
- 2018
- [j8]Deming Chen, Andrew Putnam, Steven J. E. Wilton:
Introduction to the Special Section on Deep Learning in FPGAs. ACM Trans. Reconfigurable Technol. Syst. 11(3): 14:1-14:3 (2018) - [c20]Daniel Firestone, Andrew Putnam, Sambrama Mundkur, Derek Chiou, Alireza Dabagh, Mike Andrewartha, Hari Angepat, Vivek Bhanu, Adrian M. Caulfield, Eric S. Chung, Harish Kumar Chandrappa, Somesh Chaturmohta, Matt Humphrey, Jack Lavier, Norman Lam, Fengfen Liu, Kalin Ovtcharov, Jitu Padhye, Gautham Popuri, Shachar Raindel, Tejas Sapre, Mark Shaw, Gabriel Silva, Madhan Sivakumar, Nisheeth Srivastava, Anshuman Verma, Qasim Zuhair, Deepak Bansal, Doug Burger, Kushagra Vaid, David A. Maltz, Albert G. Greenberg:
Azure Accelerated Networking: SmartNICs in the Public Cloud. NSDI 2018: 51-66 - 2017
- [j7]Adrian M. Caulfield, Eric S. Chung, Andrew Putnam
Configurable Clouds. IEEE Micro 37(3): 52-61 (2017) - [c19]Andrew Putnam:
Designing and Programming the Configurable Cloud. Conf. Computing Frontiers 2017: 328 - [c18]Andrew Putnam:
FPGAs in the Datacenter: Combining the Worlds of Hardware and Software Development. ACM Great Lakes Symposium on VLSI 2017: 5 - [c17]Bojie Li, Zhenyuan Ruan, Wencong Xiao, Yuanwei Lu, Yongqiang Xiong, Andrew Putnam
KV-Direct: High-Performance In-Memory Key-Value Store with Programmable NIC. SOSP 2017: 137-152 - 2016
- [j6]Andrew Putnam
A reconfigurable fabric for accelerating large-scale datacenter services. Commun. ACM 59(11): 114-122 (2016) - [c16]Shlomi Alkalay, Hari Angepat, Adrian M. Caulfield, Eric S. Chung, Oren Firestein, Michael Haselman, Stephen Heil, Kyle Holohan, Matt Humphrey, Tamás Juhász, Puneet Kaur, Sitaram Lanka, Daniel Lo, Todd Massengill, Kalin Ovtcharov, Michael Papamichael, Andrew Putnam, Raja Seera, Rimon Tadros, Jason Thong, Lisa Woods, Derek Chiou, Doug Burger:
Agile Co-Design for a Reconfigurable Datacenter. FPGA 2016: 15 - [c15]Andrew Putnam:
The configurable cloud - accelerating hyperscale datacenter services with FPGAs. FPT 2016: 2 - [c14]Adrian M. Caulfield, Eric S. Chung, Andrew Putnam
A cloud-scale acceleration architecture. MICRO 2016: 7:1-7:13 - 2015
- [j5]Andrew Putnam
A Reconfigurable Fabric for Accelerating Large-Scale Datacenter Services. IEEE Micro 35(3): 10-22 (2015) - [c13]Thomas Pöppelmann, Michael Naehrig, Andrew Putnam
Accelerating Homomorphic Evaluation on Reconfigurable Hardware. CHES 2015: 143-163 - [i1]Thomas Pöppelmann, Michael Naehrig, Andrew Putnam, Adrián Macías:
Accelerating Homomorphic Evaluation on Reconfigurable Hardware. IACR Cryptol. ePrint Arch. 2015: 631 (2015) - 2014
- [c12]Andrew Putnam
A reconfigurable fabric for accelerating large-scale datacenter services. ISCA 2014: 13-24 - 2013
- [j4]Jonathan Kaveh Valamehr, Melissa Chase, Seny Kamara, Andrew Putnam
Inspection-Resistant Memory Architectures. IEEE Micro 33(3): 48-56 (2013) - [c11]Behnam Robatmili, Dong Li, Hadi Esmaeilzadeh, Madhu Saravana Sibi Govindan, Aaron Smith, Andrew Putnam
How to implement effective prediction and forwarding for fusable dynamic multicore architectures. HPCA 2013: 460-471 - 2012
- [c10]Jonathan Valamehr, Melissa Chase, Seny Kamara, Andrew Putnam
Inspection resistant memory: Architectural support for security from physical examination. ISCA 2012: 130-141 - 2010
- [j3]Andrew Putnam, Aaron Smith, Doug Burger:
Dynamic vectorization in the E2 dynamic multicore architecture. SIGARCH Comput. Archit. News 38(4): 27-32 (2010) - [j2]Manuel Saldaña, Arun Patel, Christopher A. Madill, Daniel Nunes, Danyao Wang, Paul Chow, Ralph Wittig, Henry Styles, Andrew Putnam
MPI as a Programming Model for High-Performance Reconfigurable Computers. ACM Trans. Reconfigurable Technol. Syst. 3(4): 22:1-22:29 (2010)
2000 – 2009
- 2009
- [c9]Andrew Putnam, Susan J. Eggers, Dave Bennett, Eric Dellinger, Jeff Mason, Henry Styles, Prasanna Sundararajan, Ralph Wittig:
Performance and power of cache-based reconfigurable computing. FPGA 2009: 281 - [c8]Andrew Putnam
Performance and power of cache-based reconfigurable computing. ISCA 2009: 395-405 - 2008
- [c7]Andrew Putnam, Dave Bennett, Eric Dellinger, Jeff Mason, Prasanna Sundararajan:
CHiMPS: a high-level compilation flow for hybrid CPU-FPGA architectures. FPGA 2008: 261 - [c6]Andrew Putnam
CHiMPS: A C-level compilation flow for hybrid CPU-FPGA architectures. FPL 2008: 173-178 - [c5]Manuel Saldaña, Arun Patel, Christopher A. Madill, Daniel Nunes, Danyao Wang, Henry Styles, Andrew Putnam
MPI as an abstraction for software-hardware interaction for HPRCs. HPRCTA@SC 2008: 1-10 - 2007
- [j1]Steven Swanson
The WaveScalar architecture. ACM Trans. Comput. Syst. 25(2): 4:1-4:54 (2007) - 2006
- [c4]Andrew Petersen, Andrew Putnam
Reducing control overhead in dataflow architectures. PACT 2006: 182-191 - [c3]Martha Mercaldi, Steven Swanson
Instruction scheduling for a tiled dataflow architecture. ASPLOS 2006: 141-150 - [c2]Steven Swanson
Area-Performance Trade-offs in Tiled Dataflow Architectures. ISCA 2006: 314-326 - [c1]Martha Mercaldi, Steven Swanson
Modeling instruction placement on a spatial architecture. SPAA 2006: 158-169
Coauthor Index
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