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Evren Cesur
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2010 – 2019
- 2016
- [c8]Tevfik Kadioglu, Nerhun Yildiz, Evren Cesur:
Low power Internet of Things gateway. SIU 2016: 1613-1616 - 2015
- [j2]Nerhun Yildiz
, Evren Cesur, Kamer Kayaer, Vedat Tavsanoglu, Murathan Alpay:
Architecture of a Fully Pipelined Real-Time Cellular Neural Network Emulator. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(1): 130-138 (2015) - [c7]Osman Levent Savkay, Vedat Tavsanoglu, Müstak Erhan Yalçin
Computer assisted sperm analysis system designed on a hybrid CPU + FPGA architecture. SIU 2015: 1425-1428 - 2014
- [c6]O. Levent Savkay, Evren Cesur, Nerhun Yildiz
Realization of processing blocks of CNN based CASA system on CPU and FPGA. ISCAS 2014: 2081-2084 - 2013
- [c5]O. Levent Savkay, Nerhun Yildiz
Realization of preprocessing blocks of CNN based CASA system on FPGA. ECCTD 2013: 1-4 - [c4]Oguzhan Yavuz, Sadiye Nergis Tural-Polat
3-D spatio-temporal Gabor-type filter implementations with Time-Derivative Cellular Neural Networks. ECCTD 2013: 1-4 - [c3]Nurullah Çalik, Evren Cesur, Vedat Tavsanoglu:
Handwritten character recognition application by using Cellular Neural Network. SIU 2013: 1-4 - 2012
- [j1]Evren Cesur, Nerhun Yildiz
On an Improved FPGA Implementation of CNN-Based Gabor-Type Filters. IEEE Trans. Circuits Syst. II Express Briefs 59-II(11): 815-819 (2012) - 2011
- [c2]Evren Cesur, Nerhun Yildiz
An improved FPGA implementation of CNN Gabor-type filters. ISCAS 2011: 881-884
2000 – 2009
- 2007
- [c1]Ertugrul Saatci
An FPGA implementation Of 2-D CNN gabor-type filter. ECCTD 2007: 280-283
Coauthor Index
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