default search action
Yang Jiang 0002
Person information
- affiliation: University of Macau, State Key Laboratory of Analog and Mixed-Signal VLSI, China
Other persons with the same name
- Yang Jiang — disambiguation page
- Yang Jiang 0001
— University of Kentucky, Lexington, College of Medicine, KY, USA
- Yang Jiang 0003
- Yang Jiang 0004
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2020 – today
- 2024
- [j18]Xiongjie Zhang
An Outphase-Interleaved Switched-Capacitor Hybrid Buck Converter With Relieved Capacitor Inrush Current and COUT-Free Operations. IEEE J. Solid State Circuits 59(4): 1078-1092 (2024) - [j17]Feiyu Li
A 93.4% Peak Efficiency CLOAD-Free Multi-Phase Switched-Capacitor DC-DC Converter Achieving a Fast DVS up to 222.5 mV/ns. IEEE J. Solid State Circuits 59(6): 1747-1758 (2024) - [j16]Xiongjie Zhang, Anyang Zhao
A 24-V-Input Highly Integrated Interleaved-Inductor Multiple Step-Down Hybrid DC-DC Converter With Inherent Current Equalization Characteristics. IEEE J. Solid State Circuits 59(9): 2895-2906 (2024) - [j15]Qiaobo Ma
A Cross-Coupled Hybrid Switched-Capacitor Buck Converter With Extended Conversion Range and Enhanced DCR Loss Reduction. IEEE J. Solid State Circuits 59(10): 3192-3203 (2024) - [j14]Xiongjie Zhang
A 12V-to-1V Outphase-Interleaved SC Hybrid Converter With Enhanced Inductor De-Energizing Slew Rate and Adaptive Deadtime Control. IEEE Trans. Circuits Syst. II Express Briefs 71(5): 2579-2583 (2024) - [c24]Huihua Li
A 96.7%-Efficient 2.5A Scalable DC-DC Converter Module with Complementary Dual-Mode Reconfigurable Hybrid Topology Achieving Always Inductor Current Reduction, Continuously Adjustable VCR Range, and Interleaving COUT Augmentation. CICC 2024: 1-2 - [c23]Qiaobo Ma, Huihua Li
A Multi-Phase Multi-Path Hybrid Buck Converter for 9-48V to 0.8-1.2V Conversion with Improved DCR-Loss Reduction and Alleviated CFLY Current Gathering Achieving 88.3% Peak Efficiency and 176A/cm3Density. CICC 2024: 1-2 - [c22]Guangshu Zhao, Chao Xie, Chenxi Wang, Yang Jiang, Milin Zhang, Pui-In Mak, Rui Paulo Martins, Man-Kay Law:
A 63ns Flipping Time, 93.6% Voltage Flipping Efficiency Auto-Calibrated Ultrasonic Energy Harvesting Interface from -25 to 85°C. CICC 2024: 1-2 - [c21]Qiaobo Ma, Yang Jiang, Huihua Li
28.3 A 12-28V to 0.6-1.8V Ratio-Regulatable Dickson SC Converter with Dual-Mode Phase Misalignment Operations Achieving 93.1% Efficiency and 6A Output. ISSCC 2024: 460-462 - [c20]Xuchu Mu, Yang Jiang, Rui Paulo Martins, Pui-In Mak:
A Fully Integrated 48-V GaN Driver Using Parallel-Multistep-Series Reconfigurable Switched-Capacitor Bank Achieving 7.7nC/mm2 On-Chip Bootstrap Driving Density. VLSI Technology and Circuits 2024: 1-2 - 2023
- [j13]Teck Seong Chang
Design and Implementation of Hybrid DC-DC Converter: A Review. IEEE Access 11: 30498-30514 (2023) - [j12]Xuchu Mu
Floating-Domain Integrated GaN Driver Techniques for DC-DC Converters: A Review. IEEE Trans. Circuits Syst. I Regul. Pap. 70(9): 3790-3805 (2023) - [j11]Qiaobo Ma
A 10.5 W, 93% Efficient Dual-Path Hybrid (DPH)-Based DC-DC Converter Incorporating a Continuous-Current-Input Switched-Capacitor Stage and Enhanced IL Reduction for 12 V/24 V Inputs. IEEE Trans. Circuits Syst. I Regul. Pap. 70(12): 5482-5495 (2023) - [c19]Qiaobo Ma, Huihua Li
A Cross-Coupled Hybrid SC Converter with Extended VCR Range and Intrinsic Loss Balance Achieving 90% Average Efficiency with 1.5% Variation Over Full Li-ion Battery Input Range and 0.95A/mm2 Peak Current Density. A-SSCC 2023: 1-3 - [c18]Jiangchao Wu, Guangshu Zhao, Litao Zhang, Yu Jia, Yang Jiang, Pui-In Mak, Rui Paulo Martins, Man Kay Law:
Fully Integrated Reconfigurable Solar Energy Harvester for $100\mu\mathrm{A}$ Burst Output Current Delivery with 78.6% Peak Energy Extraction Efficiency and Minimum Startup Incident Light Power of 0.27mW/cm2. A-SSCC 2023: 1-3 - [c17]Xiongjie Zhang, Qiaobo Ma
A 0.05-to-3.1A 585mA/mm3 97.3%-Efficiency Outphase Switched-Capacitor Hybrid Buck Converter with Relieved Capacitor Inrush Current and COUT-Free Operation. VLSI Technology and Circuits 2023: 1-2 - 2022
- [j10]Yang Jiang
Arithmetic Progression Switched-Capacitor DC-DC Converter Topology With Soft VCR Transitions and Quasi-Symmetric Two-Phase Charge Delivery. IEEE J. Solid State Circuits 57(10): 2919-2933 (2022) - [j9]Jieyun Zhang, Chongyao Xu
A 4T/Cell Amplifier-Chain-Based XOR PUF With Strong Machine Learning Attack Resilience. IEEE Trans. Circuits Syst. I Regul. Pap. 69(1): 366-377 (2022) - [j8]Man-Kay Law
Miniaturized Energy Harvesting Systems Using Switched-Capacitor DC-DC Converters. IEEE Trans. Circuits Syst. II Express Briefs 69(6): 2629-2634 (2022) - [c16]Huihua Li, Qiaobo Ma
Adaptive Line-Transient Enhancement Techniques for Dual-Path Hybrid Converter Achieving Ultra-Low Output Overshoot/Undershoot. APCCAS 2022: 319-323 - [c15]Ruijie Zhao, Xiongjie Zhang, Xuchu Mu, Huihua Li, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
A Switched-Capacitor Hybrid Quadratic Buck Converter for 48V-Input Wide-Range Conversion. ICECS 2022 2022: 1-2 - [c14]Xuchu Mu, Yang Jiang, Man-Kay Law, Pui-In Mak
Design Challenges and Considerations of Non-isolated Gate Driver for GaN-based Converters. MWSCAS 2022: 1-4 - [c13]Xiongjie Zhang, Yang Jiang, Man-Kay Law, Pui-In Mak
Modelling and Analysis of ΔΣ-Modulation-Based Output Spectrum Spur Reduction in Dual-Path Hybrid DC-DC Converters. PRIME 2022: 269-272 - 2021
- [j7]Xiongjie Zhang, Qiaobo Ma
A 12V-to-1V switched-capacitor-assisted hybrid converter with dual-path charge conduction and zero-voltage switching. IEICE Electron. Express 18(22): 20210382 (2021) - [j6]Qiaobo Ma
A multi-path switched-capacitor-inductor hybrid DC-DC converter with reduced inductor loss and extended voltage conversion range. IEICE Electron. Express 18(22): 20210405 (2021) - [j5]Zhaobo Zhang
A High-Efficiency Dual-Antenna RF Energy Harvesting System Using Full-Energy Extraction With Improved Input Power Response. IEEE Open J. Circuits Syst. 2: 436-444 (2021) - [j4]Jiangchao Wu, Hou-Man Leong, Yang Jiang
A Fully Integrated 10-V Pulse Driver Using Multiband Pulse-Frequency Modulation in 65-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 29(9): 1665-1669 (2021) - [c12]Yang Jiang, Man-Kay Law, Pui-In Mak
An Arithmetic Progression Switched-Capacitor DC-DC Converter with Soft VCR Transitions Achieving 93.7% Peak Efficiency and 400 mA Output Current. A-SSCC 2021: 1-3 - [c11]Chongyao Xu, Jieyun Zhang, Man-Kay Law, Yang Jiang, Xiaojin Zhao, Pui-In Mak
Modeling Attack Resistant Strong PUF Exploiting Obfuscated Interconnections With <0.83% Bit-Error Rate. A-SSCC 2021: 1-3 - 2020
- [c10]Jinwei Zhao, Yang Jiang, Man-Kay Law, Rami Ghannam
An Implantable Photovoltaic Energy Harvesting System with Skin Optical Analysis. ICECS 2020: 1-4
2010 – 2019
- 2019
- [j3]Yang Jiang
Algebraic Series-Parallel-Based Switched-Capacitor DC-DC Boost Converter With Wide Input Voltage Range and Enhanced Power Density. IEEE J. Solid State Circuits 54(11): 3118-3134 (2019) - [j2]Jiangchao Wu, Ka-Chon Lei, Hou-Man Leong, Yang Jiang
Fully Integrated High Voltage Pulse Driver Using Switched-Capacitor Voltage Multiplier and Synchronous Charge Compensation in 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 66-II(10): 1768-1772 (2019) - [c9]Zhiyuan Chen, Yang Jiang
A Piezoelectric Energy-Harvesting Interface Using Split-Phase Flipping-Capacitor Rectifier and Capacitor Reuse Multiple-VCR SC DC-DC Achieving 9.3× Energy-Extraction Improvement. ISSCC 2019: 424-426 - 2018
- [j1]Yang Jiang
Algorithmic Voltage-Feed-In Topology for Fully Integrated Fine-Grained Rational Buck-Boost Switched-Capacitor DC-DC Converters. IEEE J. Solid State Circuits 53(12): 3455-3469 (2018) - [c8]Yang Jiang
A 0.22-to-2.4V-input fine-grained fully integrated rational buck-boost SC DC-DC converter using algorithmic voltage-feed-in (AVFI) topology achieving 84.1% peak efficiency at 13.2mW/mm2. ISSCC 2018: 422-424 - 2013
- [c7]Yun Du, Tao He, Yang Jiang
A continuous-time VCO-assisted VCO-based ΣΔ modulator with 76.6dB SNDR and 10MHz BW. ISCAS 2013: 373-376 - 2012
- [c6]Yun Du, Tao He, Yang Jiang
A robust NTF zero optimization technique for both low and high OSRs sigma-delta modulators. APCCAS 2012: 29-32 - [c5]Tao He, Yun Du, Yang Jiang
A DT 0-2 MASH ΣΔ modulator with VCO-based quantizer for enhanced linearity. APCCAS 2012: 33-36 - [c4]Tao He, Yang Jiang
A 10MHz BW 78dB DR CT ΣΔ modulator with novel switched high linearity VCO-based quantizer. ISCAS 2012: 65-68 - [c3]Chen-Yan Cai, Yang Jiang
An ELD tracking compensation technique for active-RC CT ΣΔ modulators. MWSCAS 2012: 1096-1099 - 2010
- [c2]Yang Jiang
A reduced jitter-sensitivity clock generation technique for continuous-time ΣΔ modulators. APCCAS 2010: 1011-1014 - [c1]Yang Jiang
A Fixed-Pulse Shape Feedback Technique with reduced clock-jitter sensitivity in Continuous-Time sigma-delta modulators. ICECS 2010: 547-550
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from ,
, and
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and
to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-12-13 19:13 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by: