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Kenichi Sami
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2010 – 2019
- 2017
- [j4]Yosuke Ogasawara, Ryuichi Fujimoto, Tsuneo Suzuki, Kenichi Sami:
An 18 µW Spur Cancelled Clock Generator for Recovering Receiver Sensitivity in Wireless SoCs. IEICE Trans. Electron. 100-C(6): 529-538 (2017) - [j3]Masayoshi Oshiro, Tatsuhiko Maruyama, Takashi Tokairin, Yuki Tuda, Tong Wang, Naotaka Koide, Yosuke Ogasawara, Tuan Thanh Ta, Hiroshi Yoshida, Kenichi Sami:
A 3.2mA-RX 3.5mA-TX Fully Integrated SoC for Bluetooth Low Energy System. IEICE Trans. Electron. 100-C(10): 833-840 (2017) - 2016
- [c4]Masayoshi Oshiro, Tatsuhiko Maruyama, Takashi Tokairin, Yuki Tuda, Tong Wang, Naotaka Koide, Yosuke Ogasawara, Tuan Thanh Ta, Hiroshi Yoshida, Kenichi Sami:
A 3.2 mA-RX 3.5 mA-TX fully integrated SoC for Bluetooth Low Energy. A-SSCC 2016: 1-4 - [c3]Yosuke Ogasawara, Hiroki Sakurai, Ryuichi Fujimoto, Kenichi Sami:
An 18 µW spur canceled clock generator for recovering receiver sensitivity in wireless SoCs. VLSI Circuits 2016: 1-2 - 2013
- [j2]Daisuke Miyashita, Kenichi Agawa, Hirotsugu Kajihara, Kenichi Sami, Ichiro Seto, Ryuichi Fujimoto, Yasuo Unekawa:
A -70 dBm-Sensitivity 522 Mbps 0.19 nJ/bit-TX 0.43 nJ/bit-RX Transceiver for TransferJetTM SoC in 65 nm CMOS. IEICE Trans. Electron. 96-C(6): 783-789 (2013) - 2012
- [c2]Daisuke Miyashita, Kenichi Agawa, Hirotsugu Kajihara, Kenichi Sami, Masaomi Iwanaga, Yosuke Ogasawara, Tomohiko Ito, Daisuke Kurose, Naotaka Koide, Toru Hashimoto, Hiroki Sakurai, Takafumi Yamaji, Takashi Kurihara, Kazumi Sato, Ichiro Seto, Hiroshi Yoshida, Ryuichi Fujimoto, Yasuo Unekawa:
A -70dBm-sensitivity 522Mbps 0.19nJ/bit-TX 0.43nJ/bit-RX transceiver for TransferJet™ SoC in 65nm CMOS. VLSIC 2012: 74-75 - 2010
- [j1]Jun Deguchi, Daisuke Miyashita, Yosuke Ogasawara, Gaku Takemura, Masaomi Iwanaga, Kenichi Sami, Rui Ito, Junji Wadatsumi, Yuki Tsuda, Shoko Oda, Shunji Kawaguchi, Nobuyuki Itoh, Mototsugu Hamada:
A Fully Integrated 2 ˟ 1 Dual-Band Direct-Conversion Mobile WiMAX Transceiver With Dual-Mode Fractional Divider and Noise-Shaping Transimpedance Amplifier in 65 nm CMOS. IEEE J. Solid State Circuits 45(12): 2774-2784 (2010) - [c1]Jun Deguchi, Daisuke Miyashita, Yosuke Ogasawara, Gaku Takemura, Masaomi Iwanaga, Kenichi Sami, Rui Ito, Junji Wadatsumi, Yuki Tsuda, Shoko Oda, Shunji Kawaguchi, Nobuyuki Itoh, Mototsugu Hamada:
A fully integrated 2×1 dual-band direct-conversion transceiver with dual-mode fractional divider and noise-shaping TIA for mobile WiMAX SoC in 65nm CMOS. ISSCC 2010: 456-457
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