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Maarten Kuijk
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2020 – today
- 2024
- [j20]Ayman Morsy
, Maarten Kuijk
Correlation-Assisted Pixel Array for Direct Time of Flight. Sensors 24(16): 5380 (2024) - 2022
- [j19]Gobinath Jegannathan
Correction: Jegannathan et al. An Overview of CMOS Photodetectors Utilizing Current-Assistance for Swift and Efficient Photo-Carrier Detection. Sensors 2021, 21, 4576. Sensors 22(7): 2610 (2022) - 2021
- [j18]Gobinath Jegannathan
An Overview of CMOS Photodetectors Utilizing Current-Assistance for Swift and Efficient Photo-Carrier Detection. Sensors 21(13): 4576 (2021) - 2020
- [j17]Gobinath Jegannathan
Current-Assisted SPAD with Improved p-n Junction and Enhanced NIR Performance. Sensors 20(24): 7105 (2020)
2010 – 2019
- 2019
- [c14]Thomas Van den Dries, Hans Ingelberts, Sven Boulanger, Maarten Kuijk:
A 5 ps resolution, 8.6 ns delay range digital delay line using combinatorial redundancy. PRIME 2019: 21-24 - 2018
- [c13]Volodymyr Seliuchenko, Sharath Patil, Marcelo Mizuki, Saad Ahmad, Maarten Kuijk
Partial reset HDR image sensor with improved fixed pattern noise performance. IMSE 2018: 1-6 - 2015
- [j16]Viki Szortyka, Qixian Shi, Kuba Raczkowski, Bertrand Parvais, Maarten Kuijk
A 42 mW 200 fs-Jitter 60 GHz Sub-Sampling PLL in 40 nm CMOS. IEEE J. Solid State Circuits 50(9): 2025-2036 (2015) - [j15]Viki Szortyka, Kuba Raczkowski, Maarten Kuijk
A Wideband Beamforming Lowpass Filter for 60 GHz Phased-Array Receivers. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(9): 2324-2333 (2015) - 2014
- [c12]Viki Szortyka, Qixian Shi, Kuba Raczkowski, Bertrand Parvais, Maarten Kuijk, Piet Wambacq:
21.4 A 42mW 230fs-jitter sub-sampling 60GHz PLL in 40nm CMOS. ISSCC 2014: 366-367 - 2010
- [j14]Bob Verbruggen, Jan Craninckx
A 2.6 mW 6 bit 2.2 GS/s Fully Dynamic Pipeline ADC in 40 nm Digital CMOS. IEEE J. Solid State Circuits 45(10): 2080-2090 (2010) - [c11]Bob Verbruggen, Jan Craninckx
A 2.6mW 6b 2.2GS/s 4-times interleaved fully dynamic pipelined ADC in 40nm digital CMOS. ISSCC 2010: 296-297
2000 – 2009
- 2009
- [j13]Jonathan Borremans, Steven Thijs, Piet Wambacq, Yves Rolain, Dimitri Linten, Maarten Kuijk:
A Fully Integrated 7.3 kV HBM ESD-Protected Transformer-Based 4.5-6 GHz CMOS LNA. IEEE J. Solid State Circuits 44(2): 344-353 (2009) - [j12]Bob Verbruggen, Jan Craninckx
A 2.2 mW 1.75 GS/s 5 Bit Folding Flash ADC in 90 nm Digital CMOS. IEEE J. Solid State Circuits 44(3): 874-882 (2009) - [j11]Jonathan Borremans, Julien Ryckaert, Claude Desset, Maarten Kuijk, Piet Wambacq, Jan Craninckx
A Low-Complexity, Low-Phase-Noise, Low-Voltage Phase-Aligned Ring Oscillator in 90 nm Digital CMOS. IEEE J. Solid State Circuits 44(7): 1942-1949 (2009) - [c10]Ahmed Mohamed AbdelHamid, Ankur Anchlia, Stylianos Mamagkakis, Miguel Corbalan Miranda, Bart Dierickx
A Standardized Knobs and Monitors RTL2RTL Insertion Methodology for Fine Grain SoC Tuning. DSD 2009: 401-408 - 2008
- [j10]Ward van der Tempel, Daniel Van Nieuwenhove, Riemer Grootjans, Maarten Kuijk:
A 1 × 64 Complementary Metal Oxide Semiconductor ranging sensor based on Current-Assisted Photonic Demodulators. Int. J. Intell. Syst. Technol. Appl. 5(3/4): 237-245 (2008) - [j9]Daniel Van Nieuwenhove, Ward van der Tempel, Riemer Grootjans, Maarten Kuijk:
Time-Of-Flight distance sensor with enhanced dynamic range. Int. J. Intell. Syst. Technol. Appl. 5(3/4): 246-254 (2008) - [j8]Jonathan Borremans, Piet Wambacq, Charlotte Soens, Yves Rolain, Maarten Kuijk:
Low-Area Active-Feedback Low-Noise Amplifier Design in Scaled Digital CMOS. IEEE J. Solid State Circuits 43(11): 2422-2433 (2008) - [j7]Jonathan Borremans, Andrea Bevilacqua
A Compact Wideband Front-End Using a Single-Inductor Dual-Band VCO in 90 nm Digital CMOS. IEEE J. Solid State Circuits 43(12): 2693-2705 (2008) - [c9]Jonathan Borremans, Julien Ryckaert, Piet Wambacq, Maarten Kuijk, Jan Craninckx
A low-complexity, low phase noise, low-voltage phase-aligned ring oscillator in 90 nm digital CMOS. ESSCIRC 2008: 410-413 - [c8]Bob Verbruggen, Jan Craninckx
A 2.2mW 5b 1.75GS/s Folding Flash ADC in 90nm Digital CMOS. ISSCC 2008: 252-253 - [c7]Jonathan Borremans, Stephane Bronckers, Piet Wambacq, Maarten Kuijk, Jan Craninckx
A Single-Inductor Dual-Band VCO in a 0.06mm2 5.6GHz Multi-Band Front-End in 90nm Digital CMOS. ISSCC 2008: 324-325 - [c6]Jonathan Borremans, Piet Wambacq, Maarten Kuijk, Geert Carchon, Stefaan Decoutere:
A 400 μW 4.7-to-6.4GHz VCO under an Above-IC Inductor in 45nm CMOS. ISSCC 2008: 536-537 - 2007
- [c5]Jonathan Borremans, Piet Wambacq, Geert Van der Plas
A switchable low-area 2.4-and-5 GHz dual-band LNA in digital CMOS. ESSCIRC 2007: 376-379 - 2006
- [j6]Charlotte Soens, Geert Van der Plas
Modeling of Substrate Noise Generation, Isolation, and Impact for an LC-VCO and a Digital Modem on a Lightly-Doped Substrate. IEEE J. Solid State Circuits 41(9): 2040-2051 (2006) - [j5]J. Balachandran, Steven Brebels, Geert Carchon, Maarten Kuijk, Walter De Raedt
Wafer-level package interconnect options. IEEE Trans. Very Large Scale Integr. Syst. 14(6): 654-659 (2006) - [c4]J. Balachandran, Steven Brebels, Geert Carchon, Walter De Raedt
Constant Impedance Scaling Paradigm for Scaling LC transmission lines. ISQED 2006: 387-392 - [c3]J. Balachandran, Maarten Kuijk, Steven Brebels, Geert Carchon, Walter De Raedt
Efficient Link Architecture for On-Chip Serial links and Networks. SoC 2006: 1-4 - [c2]J. Balachandran, Steven Brebels, Geert Carchon, Maarten Kuijk, Walter De Raedt
Constant impedance scaling paradigm for interconnect synthesis. SLIP 2006: 99-105 - 2005
- [j4]Charlotte Soens, Geert Van der Plas
Performance degradation of LC-tank VCOs by impact of digital switching noise in lightly doped substrates. IEEE J. Solid State Circuits 40(7): 1472-1481 (2005) - 2004
- [j3]Xavier Maillard, Maarten Kuijk:
An 8-Gb/s capacitively coupled receiver with high common-mode rejection for uncoded data. IEEE J. Solid State Circuits 39(11): 1909-1915 (2004) - 2002
- [j2]Xavier Maillard, Frédéric Devisch, Maarten Kuijk:
A 900-Mb/s CMOS data recovery DLL using half-frequency clock. IEEE J. Solid State Circuits 37(6): 711-715 (2002) - 2000
- [j1]Cathleen Rooman, Daniël Coppée, Maarten Kuijk:
Asynchronous 250-Mb/s optical receivers with integrated detector in standard CMOS technology for optocoupler applications. IEEE J. Solid State Circuits 35(7): 953-958 (2000) - [c1]Frédéric Devisch, Johan Stiens, Roger Vounckx, Maarten Kuijk:
A power reduction method for off-chip interconnects. ISCAS 2000: 265-268
Coauthor Index
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last updated on 2024-10-04 20:02 CEST by the dblp team
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