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Peiyi Zhao
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2020 – today
- 2023
- [j9]Zisong Wang, Peiyi Zhao, Tom Springer, Congyi Zhu, Jaccob Mau, Andrew Wells, Yinshui Xia, Lingli Wang:
Low-Power Redundant-Transition-Free TSPC Dual-Edge-Triggering Flip-Flop Using Single-Transistor-Clocked Buffer. IEEE Trans. Very Large Scale Integr. Syst. 31(5): 706-710 (2023) - [c15]Daijun Yu, Beibei Li, Peiyi Zhao, Mingyue Hu, Ruochen Fu, Zirui Yi:
Exploring How to Improve User Experience of Enterprise Service Products through "Dual Perspective Model". HCI (20) 2023: 425-439 - 2022
- [c14]Peiyi Zhao, Hanjiang Hong, Yin Xu, Yihang Huang, Dazhi He, Wenjun Zhang:
On Bit Mapping for Golden Angle Modulation in the Presence of Strong Phase Noise. BMSB 2022: 1-6 - [c13]Peiyi Zhao, Yin Xu, Dazhi He, Hanjiang Hong, Yihang Huang, Wenjun Zhang:
Design of Non-uniform Constellations in the Channel with Phase Noise. IWCMC 2022: 1353-1358 - 2021
- [j8]Ashkan Samiee, Payal Borulkar, Ronald F. DeMara, Peiyi Zhao, Yu Bai:
Low-Energy Acceleration of Binarized Convolutional Neural Networks Using a Spin Hall Effect Based Logic-in-Memory Architecture. IEEE Trans. Emerg. Top. Comput. 9(2): 928-940 (2021) - [c12]Peiyi Zhao, Zisong Wang, Congyi Zhu, Tom Springer, Jacob Anabi, Yinshui Xia, Lingli Wang:
Ultra-low-voltage Low-power Self-adaptive Static Pulsed Latch. ASICON 2021: 1-4
2010 – 2019
- 2018
- [c11]Xuegong Zhou, Lingli Wang, Peiyi Zhao, Alan Mishchenko:
Fast Adjustable NPN Classification using Generalized Symmetries. FPL 2018: 1-7 - 2013
- [c10]Guoqiang Hang, Yang Yang, Peiyi Zhao, Xiaohui Hu, Xiaohu You:
A clocked differential switch logic using floating-gate MOS transistors. ASICON 2013: 1-4 - 2011
- [j7]Peiyi Zhao, Jason McNeely, Weidong Kuang, Nan Wang, Zhongfeng Wang:
Design of Sequential Elements for Low Power Clocking System. IEEE Trans. Very Large Scale Integr. Syst. 19(5): 914-918 (2011) - 2010
- [j6]Weidong Kuang, Peiyi Zhao, Jiann-Shiun Yuan, Ronald F. DeMara:
Design of Asynchronous Circuits for High Soft Error Tolerance in Deep Submicrometer CMOS Circuits. IEEE Trans. Very Large Scale Integr. Syst. 18(3): 410-422 (2010) - [j5]Nan Wang, Azeez Sanusi, Peiyi Zhao, Mohamed A. Elgamel, Magdy A. Bayoumi:
PMCNOC: A Pipelining Multi-channel Central Caching Network-on-chip Communication Architecture Design. J. Signal Process. Syst. 60(3): 315-331 (2010)
2000 – 2009
- 2009
- [j4]Peiyi Zhao, Jason McNeely, Pradeep Kumar Golconda, Soujanya Venigalla, Nan Wang, Magdy A. Bayoumi, Weidong Kuang, Luke Downey:
Low-Power Clocked-Pseudo-NMOS Flip-Flop for Level Conversion in Dual Supply Systems. IEEE Trans. Very Large Scale Integr. Syst. 17(9): 1196-1202 (2009) - [c9]Peiyi Zhao, M. Drew Moshier, Michael Fahy:
Incorporating real world integrated circuit in a liberal arts computer science program. MSE 2009: 97-99 - 2008
- [c8]Jason McNeely, Yasser Ismail, Magdy A. Bayoumi, Peiyi Zhao:
Power analysis of the Huffman decoding tree. ICIP 2008: 1416-1419 - 2007
- [j3]Peiyi Zhao, Jason McNeely, Pradeep Golconda, Magdy A. Bayoumi, Robert A. Barcenas, Weidong Kuang:
Low-Power Clock Branch Sharing Double-Edge Triggered Flip-Flop. IEEE Trans. Very Large Scale Integr. Syst. 15(3): 338-345 (2007) - [c7]Weidong Kuang, Casto Manuel Ibarra, Peiyi Zhao:
Soft Error Hardening for Asynchronous Circuits. DFT 2007: 273-281 - [c6]Peiyi Zhao, Jason McNeely, Magdy A. Bayoumi, Pradeep Kumar Golconda, Weidong Kuang:
A Low Power Domino with Differential-Controlled-Keeper. ISCAS 2007: 1625-1628 - [c5]Nan Wang, Azeez Sanusi, Peiyi Zhao, Shaheen Mohamed, Magdy A. Bayoumi:
PMCNOC: A Pipelining Multi-Channel Central Caching Network-on-Chip Communication Architecture Design. SiPS 2007: 487-492 - 2006
- [c4]Md. Ibrahim Faisal, Magdy A. Bayoumi, Peiyi Zhao:
A low-power clock frequency multiplier. ISCAS 2006 - 2004
- [j2]Peiyi Zhao, Tarek Darwish, Magdy A. Bayoumi:
High-performance and low-power conditional discharge flip-flop. IEEE Trans. Very Large Scale Integr. Syst. 12(5): 477-484 (2004) - [c3]Peiyi Zhao, Pradeep Kumar Golconda, Magdy A. Bayoumi:
Contention reduced/conditional discharge flip-flops for level conversion in CVS systems. ISCAS (2) 2004: 669-672 - [c2]Peiyi Zhao, Pradeep Kumar Golconda, C. Archana, Magdy A. Bayoumi:
A Double-Edge Implicit-Pulsed Level Convert Flip-Flop. ISVLSI 2004: 141-144 - 2003
- [c1]Peiyi Zhao, Tarek Darwish, Magdy A. Bayoumi:
Low Power Conditional-Discharge Pulsed Flip-Flops. Embedded Systems and Applications 2003: 204-209 - 2000
- [j1]Sarnath Ramnath, Peiyi Zhao:
On the isomorphism of expressions. Inf. Process. Lett. 74(3-4): 97-102 (2000)
Coauthor Index
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