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Zouha Cherif
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2010 – 2019
- 2016
- [c6]Umer Farooq, Roselyne Chotin-Avot, Muhammad Moazam Azeem
, Zouha Cherif, Maminionja Ravoson, Saqib Khan, Habib Mehrez:
Using Timing-Driven Inter-FPGA Routing for Multi-FPGA Prototyping Exploration. DSD 2016: 641-645 - 2014
- [j2]Lilian Bossuet, Xuan Thuy Ngo, Zouha Cherif, Viktor Fischer:
A PUF Based on a Transient Effect Ring Oscillator and Insensitive to Locking Phenomenon. IEEE Trans. Emerg. Top. Comput. 2(1): 30-36 (2014) - [j1]Yeow Meng Chee
Multiply Constant-Weight Codes and the Reliability of Loop Physically Unclonable Functions. IEEE Trans. Inf. Theory 60(11): 7026-7034 (2014) - [i1]Yeow Meng Chee, Zouha Cherif, Jean-Luc Danger, Sylvain Guilley, Han Mao Kiah, Jon-Lark Kim, Patrick Solé, Xiande Zhang:
Multiply Constant-Weight Codes and the Reliability of Loop Physically Unclonable Functions. CoRR abs/1401.3928 (2014) - 2013
- [c5]Zouha Cherif, Jean-Luc Danger, Florent Lozach, Yves Mathieu, Lilian Bossuet:
Evaluation of delay PUFs on CMOS 65 nm technology: ASIC vs FPGA. HASP@ISCA 2013: 4 - [c4]Zouha Cherif, Jean-Luc Danger, Sylvain Guilley, Jon-Lark Kim, Patrick Solé:
Multiply constant weight codes. ISIT 2013: 306-310 - 2012
- [c3]Zouha Cherif, Jean-Luc Danger, Sylvain Guilley, Lilian Bossuet:
An Easy-to-Design PUF Based on a Single Oscillator: The Loop PUF. DSD 2012: 156-162 - [c2]Lubos Gaspar, Viktor Fischer, Tim Güneysu
Two IP protection schemes for multi-FPGA systems. ReConFig 2012: 1-6 - 2010
- [c1]Zouha Cherif, Florent Flament, Jean-Luc Danger, Shivam Bhasin, Sylvain Guilley, Hervé Chabanne:
Evaluation of White-Box and Grey-Box Noekeon Implementations in FPGA. ReConFig 2010: 310-315
Coauthor Index
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