default search action
Okihiko Ishizuka
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2010 – 2019
- 2010
- [j10]Motoi Inaba, Koichi Tanno, Hiroki Tamura, Okihiko Ishizuka:
Optimization and Verification of Current-Mode Multiple-Valued Digit ORNS Arithmetic Circuits. IEICE Trans. Inf. Syst. 93-D(8): 2073-2079 (2010)
2000 – 2009
- 2005
- [j9]Koichi Tanno, Kenya Kondo, Okihiko Ishizuka, Takako Toyama:
Combiner-Based MOS OTAs. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(6): 1622-1625 (2005) - [j8]Koichi Tanno, Kiminobu Sato, Hisashi Tanaka, Okihiko Ishizuka:
Low-Voltage, Low-Distortion and Rail-to-Rail CMOS Sample and Hold Circuit. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(10): 2696-2698 (2005) - 2003
- [j7]Muneo Kushima, Koichi Tanno, Okihiko Ishizuka:
Low-Power and Wide-Input Range Voltage Controlled Linear Variable Resistor Using an FG-MOSFET and Its Application. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 86-A(2): 342-349 (2003) - [j6]Dasong Zhu, Koichi Tanno, Okihiko Ishizuka:
Wide Input-Range Four-Quadrant Analog Multiplier Using Floating-Gate MOSFET's. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 86-A(7): 1759-1765 (2003) - [j5]Muneo Kushima, Koichi Tanno, Okihiko Ishizuka:
Wide-Input Range Variable Resistor Circuit Using an FG-MOSFET. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 86-A(12): 3294-3296 (2003) - 2002
- [j4]Motoi Inaba, Koichi Tanno, Okihiko Ishizuka:
Analog Inverter with Neuron-MOS Transistors and Its Application. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(2): 360-365 (2002) - [c14]Motoi Inaba, Koichi Tanno, Okihiko Ishizuka:
Multi-Valued Flip-Flop with Neuron-CMOS NMIN Circuits. ISMVL 2002: 282-288 - 2001
- [j3]Koichi Tashima, Zheng Tang, Okihiko Ishizuka, Koichi Tanno:
An immune network with interactions between B cells for pattern recognition. Syst. Comput. Jpn. 32(10): 31-41 (2001) - [c13]Motoi Inaba, Koichi Tanno, Okihiko Ishizuka:
Realization of NMAX and NMIN Functions with Multi-Valued Voltage Comparators. ISMVL 2001: 27-34 - 2000
- [c12]Jing Shen, Motoi Inaba, Koichi Tanno, Okihiko Ishizuka:
Multi-Valued Logic Pass Gate Network Using Neuron-MOS Transistors. ISMVL 2000: 15-20 - [c11]Makoto Syuto, Jing Shen, Koichi Tanno, Okihiko Ishizuka:
Multi-Input Variable-Threshold Circuits for Multi-Valued Logic Functions. ISMVL 2000: 27-32
1990 – 1999
- 1999
- [c10]Jing Shen, Koichi Tanno, Okihiko Ishizuka:
Down Literal Circuit with Neuron-MOS Transistors and Its Applications. ISMVL 1999: 180-185 - 1998
- [j2]Zheng Tang, Okihiko Ishizuka:
A Learning Multiple-Valued Logic Network: Algebra, Algorithm, and Applications. IEEE Trans. Computers 47(2): 247-251 (1998) - [c9]Jing Shen, Koichi Tanno, Okihiko Ishizuka, Zheng Tang:
Application of Neuron-MOS to Current-Mode Multi-Valued Logic Circuits. ISMVL 1998: 128-133 - 1997
- [c8]Okihiko Ishizuka, Akihiro Ohta, Koichi Tanno, Zheng Tang, Dwi Handoko:
VLSI Design of a Quaternary Multiplier with Direct Generation of Partial Products. ISMVL 1997: 169-174 - [c7]Zheng Tang, Takayuki Yamaguchi, Koichi Tashima, Okihiko Ishizuka, Koichi Tanno:
Multiple-Valued Immune Network Model and Its Simulations. ISMVL 1997: 233-240 - 1995
- [c6]Zheng Tang, Yuichi Shirata, Okihiko Ishizuka, Koichi Tanno:
A Self-Calibrating A/D Converter Using T-Model Neural Network. ISCAS 1995: 533-536 - [c5]Zheng Tang, Okihiko Ishizuka, Koichi Tanno:
Learning Multiple-Valued Logic Networks Based on Back Propagation. ISMVL 1995: 270-275 - 1993
- [c4]Zheng Tang, Okihiko Ishizuka, Qixin Cao, Hiroki Matsumoto:
Algebraic Properties of a Learning Multiple-Valued Logic Network. ISMVL 1993: 196-201 - [c3]Qixin Cao, Okihiko Ishizuka, Zheng Tang, Hiroki Matsumoto:
Algorithm and Implementation of a Learning Multiple-Valued Logic Network. ISMVL 1993: 202-207 - 1991
- [c2]Okihiko Ishizuka, Hiroshi Takarabe, Zheng Tang, Hiroki Matsumoto:
Synthesis of Current-Mode Pass Transistor Networks. ISMVL 1991: 139-146 - 1990
- [c1]Okihiko Ishizuka, Zheng Tang, Hiroki Matsumoto:
On Design of Multiple-Valued Static Random-Access-Memory. ISMVL 1990: 11-17
1970 – 1979
- 1977
- [j1]Okihiko Ishizuka:
On Multivalued Multithreshold Networks Composed of Conventional Threshold Elements. IEEE Trans. Computers 26(12): 1251-1257 (1977)
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from ,
, and
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and
to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-04-25 05:54 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by: