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IET Circuits, Devices & Systems, Volume 13
Volume 13, Number 1, 2019
- Joy Iong-Zong Chen:
Integrated routing scheme and inverter switch to develop a mobile controlled energy saving system. 1-6 - Mohammad Azim Karami
, Misagh Ansarian:
Optically triggered global shutter image sensor using single-photon avalanche diodes. 7-11 - Md Sakib Hasan
DC modelling of SOI four-gate transistor (G4FET) for implementation in circuit simulator using multivariate regression polynomial. 12-20 - Alejandro Medina-Santiago
Reconfigurable arithmetic logic unit designed with threshold logic gates. 21-30 - Malek Safieh, Jürgen Freudenberger
Pipelined decoder for the limited context order Burrows-Wheeler transformation. 31-38 - Bahram Azizollah-Ganji, Sanaz Kheiry, Samaneh Soleimani:
Design of small size and high sensitive less-invasive wireless blood pressure sensor using MEMS technology. 39-44 - Ramarao Garike, Ganesh C. Patil
Si3N4: HfO2 dual-k spacer bulk planar junctionless transistor for mixed signal integrated circuits. 45-50 - Hao Chen, Xuefeng Hu, Yuanyuan Huang, Meng Zhang, Benbao Gao:
Improved DC-DC converter topology for high step-up applications. 51-60 - Guishu Liang, Zheng Qi
Synthesis of passive fractional-order LC n-port with three element orders. 61-72 - Anping He, Guangbo Feng, Jilin Zhang, Jinzhao Wu:
An asynchronous mesh NoC based booth multiplication. 73-78 - Debarati Dey, Pradipta Roy, Debashis De
Electronic enhancement effect of doped ferromagnetic material in biomolecular heterojunction switch. 79-90 - Ashima Gupta
Highly-digital voltage scalable 4-bit flash ADC. 91-97 - Supriya Karmakar, John A. Chandy
Eight-bit ADC using non-volatile flash memory. 98-102 - Harjap Saini
Constant power consumption design of novel differential logic gate for immunity against differential power analysis. 103-109
Volume 13, Number 2, 2019
- Ao Li, Vahid Meghdadi
High-throughput 2 bit low-density parity-check forward error correction for C-RAN optical fronthaul based on a hard-decision algorithm. 111-116 - Chuang Wang
Survey of switch fault diagnosis for modular multilevel converter. 117-124 - Fayu Wan
Canonical transfer function of band-pass NGD circuit. 125-130 - Nevena R. Brnovic
Hardware implementation of the quasi-maximum likelihood estimator core for polynomial phase signals. 131-138 - Kalpana Agrawal, Ritu Srivastava
Analysing the TIPSP-based VOFET through transistor efficiency (gm/I D). 139-144 - Bulent Nafi Örnek
On boundary analysis for derivative of driving point impedance functions and its circuit applications. 145-152 - Piotr J. Osuch
High-Q second-order all-pass delay network in CMOS. 153-162 - Sandeep Garg
Low leakage domino logic circuit for wide fan-in gates using CNTFET. 163-173 - Chun-Ming Chang, Shu-Hui Tu, M. N. S. Swamy, Ahmed M. Soliman:
Design of odd nth-order elliptic high-pass filters employing OTRAs. 174-184 - Seok-Kyoon Kim:
Performance-recovery proportional-type output-voltage tracking algorithm of three-phase inverter for uninterruptible power supply applications. 185-192 - Sepehr Tabrizchi
Novel CNFET ternary circuit techniques for high-performance and energy-efficient design. 193-202 - Jie Zhang, Hong Zhang, Bo Yang, Ruizhi Zhang:
Joint background calibration of gain and timing mismatch errors with low hardware cost for time-interleaved ADCs. 203-210 - Dalvir K. Saini, Agasthya Ayachit, Marian K. Kazimierczuk:
Design and characterisation of single-layer solenoid air-core inductors. 211-218 - Jupinder Kaur, Prince Prabhakar, Anil Singh, Alpana Agarwal:
Fast digital foreground gain error calibration for pipelined ADC. 219-225 - Yan-Ming Li
Novel broken line detection circuit for multi-cells Li-ion battery protection ICs. 226-232 - Anwar Jarndal
Compact GaN class-AB Armstrong oscillator for resonant wireless power transfer. 233-238 - M. K. Jayaram Reddy, Tonse Laxminidhi:
Widely tunable low-pass gm - C filter for biomedical applications. 239-244 - Hongyi Wang, Youyou Fan, Chen Chen
Novel estimation solution on lithium-ion battery state of charge with current-free detection algorithm. 245-249 - Tanmai Kulshreshtha
Improved VLSI architecture for triangular windowed sliding DFT based on CORDIC algorithm. 251-258 - Paria Jamshidi, Mohammad Maymandi-Nejad:
Design challenges for a new mostly digital VCO-based delta-sigma modulator. 259-265
Volume 13, Number 3, 2019
- Ersin Alaybeyoglu
Implementation of capacitor multiplier with cell-based variable transconductance amplifier. 267-272 - Muhammad Fahim Ul Haque, Muhammad Touqir Pasha, Ted Johansson
Power-efficient aliasing-free PWM transmitter. 273-278 - Chun-Ming Chang, Shu-Hui Tu, M. N. Srikanta Swamy, Ahmed M. Soliman:
Analytical synthesis of elliptic voltage-mode even/odd-nth-order filter structures using DDCCs, FDCCIIs, and grounded capacitors and resistors. 279-291 - Rajeev Kumar Ranjan, Surendra Sagar
High-frequency floating memristor emulator and its experimental results. 292-302 - Ziren Wang
Investigation of the improvement of signal integrity in electrical circuits with degraded contacts using differential transmission. 303-308 - Arash Rezaei
Nanoscale field effect diode (FED) with improved speed and I ON/I OFF ratio. 309-313 - Montree Kumngern, Fabian Khateb
0.5 V bulk-driven CMOS fully differential current feedback operational amplifier. 314-320 - Weize Yu
Hardware Trojan attacks on voltage scaling-based side-channel attack countermeasure. 321-326 - Leenendra Chowdary Gunnam
2-1 Switched-current multi-stage noise-shaping delta-sigma modulator with a digital noise-cancellation circuit. 327-336 - Swarnil Roy
Circuit performance analysis of graded doping of channel of DGMOS with high-k gate stack for analogue and digital application. 337-343 - Hsiung-Cheng Lin, Kai-Chun Hsiao:
Integration of DC circuit breaker and fault current limiter based on zero-voltage resonant switching approach. 344-351 - Vivekanandan Subburaj
Investigation of a family of dual-output coupled/decoupled switched capacitor converter for low-power applications. 352-360 - Mohsen Hayati, Abbas Rezaei
Design of a high-performance lowpass-bandpass diplexer using a novel microstrip structure for GSM and WiMAX applications. 361-367 - Lu Liu, Daiguo Xu, Shiliu Xu:
Rapid calibration of bits weights error for high-resolution successive approximation register ADC. 368-373 - Mariammal Thirumeni, Deepa Thangavelusamy:
Design and analysis of hybrid PSO-GSA tuned PI and SMC controller for DC-DC Cuk converter. 374-384 - Aouissi Samiha, Mohamed Benouaret
DFT processor implementation scheme based on Rader algorithm. 385-390 - Priti Shahane
Modified X-Y routing for mesh topology based NoC router on field programmable gate array. 391-398 - Akram Bati, Patrick C. K. Luk
Dynamic analysis model of a class E2 converter for low power wireless charging links. 399-405 - Ching-Ying Huang
Analysis of wide-IF-band 65 nm-CMOS mixer for 77-110 GHz radio-astronomical receiver design. 406-413 - Xiaoyan Wang, Xiaobo Xu, Huifeng Wang:
Analytical model for uniaxial strained Si inversion layer electron effective mobility. 414-419
Volume 13, Number 4, 2019
- Ramin Razmdideh, Mohsen Saneei
All-digital delay line-based time difference amplifier in 65 nm CMOS technology. 421-427 - Jay Pathak
Assessment of interface traps in In0.53Ga0.47As FinFET with gate-to-source/drain underlap for sub-14 nm technology node to impede short channel effect. 428-434 - Sangeeta Singh, Ruchir Sinha, Pravin Neminath Kondekar:
Impact of PZT gate-stack induced negative capacitance on analogue/RF figures-of-merits of electrostatically-doped ferroelectric Schottky-barrier tunnel FET. 435-441 - Muhammad Awais
LDPC check node implementation using reversible logic. 443-455 - Sudipta Bardhan, Manodipan Sahoo
Boltzmann transport equation-based semi-classical drain current model for bilayer GFET including scattering effects. 456-464 - Kishore Sanapala
Ultra-low-voltage GDI-based hybrid full adder design for area and energy-efficient computing systems. 465-470 - Hadhiq Khan
Singular perturbation-based model reduction of power electronic circuits. 471-478 - Predrag Bosko Petrovic
Tunable flux-controlled floating memristor emulator circuits. 479-486 - Manoj Kumar Tiwari
Programmable CCCII: reliability analysis and design methodology. 487-493 - Ifana Mahbub
Low-power low-data-rate IR-UWB transmitter for paediatric apnoea monitoring system. 494-498 - Ifana Mahbub
Design of a charge amplifier for a low-power respiration-monitoring system. 499-503 - Supriya Karmakar:
Generation of four states in MOSFET for future multivalued logic circuit design. 504-509 - Debapriya Roy, Abhijit Biswas:
Effects of asymmetric underlap spacers on nanoscale junctionless transistors and design of optimised CMOS amplifiers. 510-518 - Arun Kumar
Drain current modelling of double gate-all-around (DGAA) MOSFETs. 519-525 - Piratla Uma Sathyakam
High-speed sub-threshold operation of carbon nanotube interconnects. 526-533 - Ismail Gassoumi, Lamjed Touil, Bouraoui Ouni:
Design of efficient quantum Dot cellular automata (QCA) multiply accumulate (MAC) unit with power dissipation analysis. 534-543 - Iraj Sheikhian
Improved nanoscale field effect diode. 544-547 - Soumitra Pal, Vivek Gupta, Wing-Hung Ki
Design and development of memristor-based RRAM. 548-557 - Soumyajit Seth
Observation of robust chaos in 3D electronic system. 558-564 - Chenguang Guo, Jiancheng Xu, Hui Zhang:
Design of Doppler parameters estimation circuit. 565-570
Volume 13, Number 5, 2019
- Ria Bose, Jitendra Nath Roy:
2D Surface potential and mobility modelling of doped/undoped symmetric double gate MOSFET. 571-575 - Malek Safieh, Jürgen Freudenberger
Efficient VLSI architecture for the parallel dictionary LZW data compression algorithm. 576-583 - Soumitra Pal, Vivek Gupta, Wing-Hung Ki
Transmission gate-based 9T SRAM cell for variation resilient low power and reliable internet of things applications. 584-595 - Saeide Sheikhpour
Practical fault resilient hardware implementations of AES. 596-606 - Sen Wang, Ying Yang, Wenbin Song, Huanqing Cui, Cheng Li, Li Cai:
All-spin logic XOR gate implementation based on input interface. 607-613 - Seyed Mahmoud Anisheh, Hamed Abbasizadeh, Hossein Shamsi, Chitra Dadkhah
84 dB DC-gain two-stage class-AB OTA. 614-621 - Zhonghua Ma, Yanfeng Jiang:
Carrier extraction cancellation circuit in RFID reader for improving the Tx-to-Rx isolation. 622-629 - Minoo Labibi, Mahdiyeh Mehran:
Novel liquid-based linear capacitive inclination micro-sensor with totally 360° dynamic range. 630-636 - Giri Prasad Raman, Venkatesan Perumal:
Neuro-fuzzy based two-stage spectrum allocation scheme to ensure spectrum efficiency in CRN-CSS assisted by spectrum agent. 637-646 - Ahmad Karimi
Novel design for Memristor-based n to 1 multiplexer using new IMPLY logic approach. 647-655 - Chenguang Guo, Jiancheng Xu, Wenyao Xu:
Highly efficient design of SDRAM-based CTM for real-time SAR imaging system. 656-660 - Jinbao Zhang
A novel differential fault analysis using two-byte fault model on AES Key schedule. 661-666 - Kanchan Baran Maj, Rajib Kar, Durbadal Mandal, Sakti Prasad Ghoshal:
Optimal designs of nulling resistor compensation and a robust bias-based op-amp circuit using an evolutionary approach. 667-678 - Sumalya Ghosh, Bishnu Prasad De
Symbiotic organisms search algorithm for optimal design of CMOS two-stage op-amp with nulling resistor and robust bias circuit. 679-688 - Aditya Japa, Manoj Kumar Majumder
Tunnel FET ambipolarity-based energy efficient and robust true random number generator against reverse engineering attacks. 689-695 - Daniel Valencia
Compact and high-throughput parameterisable architectures for memory-based FFT algorithms. 696-703 - Kechuan Wu, Xiaoping Wang:
Enhanced memristor-based MNNs performance on noisy dataset resulting from memristive stochasticity. 704-709 - Yang Wei Lim
Six-track multi-finger standard cell library design for near-threshold voltage operation in 130 nm complementary metal oxide semiconductor technology. 710-716 - Sang-Won Kim, Min-Joon Kim, Jaeseok Kim:
High-performance DSP platform for digital hearing aid SoC with flexible noise estimation. 717-722 - Ashutosh Kumar Singh
Fault detection in multiple controlled Fredkin circuits. 723-729
Volume 13, Number 6, 2019
- Bahram Rashidi:
Efficient and high-throughput application-specific integrated circuit implementations of HIGHT and PRESENT block ciphers. 731-740 - Yu Wang, Donghoon Yeo, Hyunchul Shin:
Effective datapath logic extraction techniques using connection vectors. 741-747 - Basim Ahmad Alabsi, Mohammed Anbar
DDoS attack aware environment with secure clustering and routing based on RPL protocol operation. 748-755 - Muhammad Bilal
Resource-efficient FPGA implementation of perspective transformation for bird's eye view generation using high-level synthesis framework. 756-762 - Prabhat Kumar Dubey
Analytical modelling and device design optimisation of epitaxial layer-based III-V tunnel FET. 763-770 - Karim Meddah
FPGA-based system for heart rate monitoring. 771-782 - Sung-Hwan Lee, Ickjin Kwon:
Fast transient low-dropout regulator with undershoot and settling time reduction technique. 783-786 - Bandi Venkata Chandan
Approach on electrically doped TFET for suppression of ambipolar and improving RF performance. 787-792 - Ravichandran Chinnappan, Premalatha Logamani, Rengaraj Ramasubbu:
Fixed frequency integral sliding-mode current-controlled MPPT boost converter for two-stage PV generation system. 793-805 - Mojtaba Noorallahzadeh
Efficient designs of reversible latches with low quantum cost. 806-815 - Vasileios Leon
Energy-efficient VLSI implementation of multipliers with double LSB operands. 816-821 - Hüseyin Yesilyurt
New active snubber cell for high power isolated PWM DC-DC converters. 822-829 - Yongtao Qiu, Jie Zhou, Youjiang Liu, Guifu Zhang, Yinong Liu:
Novel adaptive blind calibration technique of time-skew mismatches for any channel time-interleaved analogue-to-digital converters. 830-835 - Aditya Kumar Singh Pundir
Novel modified memory built in self-repair (MMBISR) for SRAM using hybrid redundancy-analysis technique. 836-842 - Okan Zafer Batur
Synchronisation free non-coherent on-off keying demodulation techniques. 843-847 - Yen-Jen Chang, Yu-Cheng Cheng
Imprecise 4-2 compressor design used in image processing applications. 848-856 - Chi-Chang Lu, Ding-Ke Huang:
1.2 V 10-bits 40 MS/s CMOS SAR ADC for low-power applications. 857-862 - Sa'ed Abed
Implementation of speech feature extraction for low-resource devices. 863-872 - Maryam Nobakht, Rahebeh Niaraki Asli:
A new 7T SRAM cell in sub-threshold region with a high performance and small area with bit interleaving capability. 873-878 - Zhen-Zhong Qi, Yao-Lin Jiang, Zhi-Hua Xiao:
Structure-preserved MOR method for coupled systems via orthogonal polynomials and Arnoldi algorithm. 879-887 - Disha Bhattacharjee, Bijoy Goswami
Analytical modelling and simulation of drain doping engineered splitted drain structured TFET and its improved performance in subduing ambipolar effect. 888-895 - Intissar Moussa
New wind turbine emulator based on DC machine: hardware implementation using FPGA board for an open-loop operation. 896-902 - Devarshi Mrinal Das
Design and development of an Internet-of-Things enabled wearable ExG measuring system with a novel signal processing algorithm for electrocardiogram. 903-907 - A. Andrew Roobert
Design and optimisation of feedforward noise cancelling complementary metal oxide semiconductor LNA for 2.4 GHz WLAN applications. 908-919 - Arnaldo del Risco Sánchez
Biasing technique to improve total harmonic distortion in an ultra-low-power operational transconductance amplifier. 920-927
Volume 13, Number 7, 2019
- Brent Maundy, Ahmed S. Elwakil
Third-order tunable-phase asymmetric cross-coupled oscillator. 929-933 - Arshad Hussain, Goang Seong Choi:
Single low-gain amplifier compensated hybrid delta-sigma modulator. 934-941 - Sahar Fatemi, Maryam Zare, Amir Farzad Khavari, Mohammad Maymandi-Nejad:
Efficient implementation of digit-serial Montgomery modular multiplier architecture. 942-949 - Dmitry Oshmarin
New oscillator concept based on band edge degeneracy in lumped double-ladder circuits. 950-957 - Jai Gopal Pandey
Hardware architectures for PRESENT block cipher and their FPGA implementations. 958-969 - Brijesh Kumar Kushwaha, Gautam Rituraj
Mathematical model for the analysis of series-parallel compensated wireless power transfer system for different misalignments. 970-978 - Seyed Milad Ebrahimipour, Behnam Ghavami, Mohsen Raji:
Adjacency criticality: a simple yet effective metric for statistical timing yield optimisation of digital integrated circuits. 979-987 - S. Rekha, Vasantha Moodabettu Harishchandra, Tonse Laxminidhi:
Ultra-low voltage, power efficient continuous-time filters in 180 nm CMOS technology. 988-997 - Yue Li, Fei Yuan
Sign3-LMS data-transition decision feedback equaliser. 998-1006 - Pramod Patali, Shahana Thottathikkulam Kassim:
High throughput FIR filter architectures using retiming and modified CSLA based adders. 1007-1017 - Junqi Huang, T. Nandha Kumar
Approximate computing using frequency upscaling. 1018-1026 - Seema Narwal
Performance investigation of electrode work-function engineered hetero-dielectric buried oxide vertical TFET. 1027-1031 - Mohammed Shoukry, Fayez Gebali, Panajotis Agathoklis:
Systolic array design space exploration of interpolators for multi-rate systems. 1032-1038 - Dinesh Kumar Dash
Analytical modelling of dielectric engineered strained dual-material double-gate-tunnelling field effect transistor. 1039-1048 - Xianlei Xu
Integrated synchronous data acquisition subsystem for high-speed GPR system. 1049-1055 - Amir Fathi, Morteza Mousazadeh, Abdollah Khoei
High-speed, low power, and dead zone improved phase frequency detector. 1056-1062 - Ramaian Subramanian Kamalakannan, Kuppusamy Venkatachalam:
Low power radiation aware transistor level design using tri-state inverter embedded non-clock gating technique. 1063-1070 - Zhao Zhang
0.1-5 GHz wideband ΔΣ fractional-N frequency synthesiser for software-defined radio application. 1071-1077 - Srinivasan Raghavendran
Bridgeless active rectifier for piezoelectric energy harvesting. 1078-1085 - Jayaram Reddy Machha Krishna Reddy, Tonse Laxminidhi:
1.8 V, 25.9 nW, 91.86 dB dynamic range second-order lowpass filter tunable in the range 4-100 Hz. 1086-1092 - Girija Sravani Kondaveeti, Koushik Guha, Srinivasa Rao Karumuri
Design of a novel structure capacitive RF MEMS switch to improve performance parameters. 1093-1101 - Ali Kazemi Nasaban Shotorban
Optical MEMS accelerometer sensor relying on a micro-ring resonator and an elliptical disk. 1102-1106
Volume 13, Number 8, 2019
- Aadil Tahir Shora
Analytical modelling and performance analysis of gate- and channel-engineered trapezoidal trigate MOSFET. 1107-1116 - Jayesh Popat, Usha Mehta
Statistical security analysis of AES with X-tolerant response compactor against all types of test infrastructure attacks with/without novel unified countermeasure. 1117-1124 - Arash Ahmadi:
High-power multi-octave laterally diffused metal-oxide-semiconductor power amplifier with resistive harmonic termination. 1125-1133 - A. Anita Angeline
Design impacts of delay invariant high-speed clock delayed dual keeper domino circuit. 1134-1141 - Ridvan Umaz
Integrated power converter design for bioturbation resilience in multi-anode microbial fuel cells. 1142-1151 - Ghasem Pasandi
Low-power data encoding/decoding for energy-efficient static random access memory design. 1152-1159 - Aleksey Dyskin
Feasibility study of the feed-forward carrier recovery technique for E-band integrated receivers. 1160-1168 - Debdut Biswas
Spur reduction architecture for multiphase fractional PLLs. 1169-1180 - Ching-Ying Huang
IL analysis for 8-way power combining network in 77-110 GHz 40 nm-complementary metal-oxide-semiconductor PA design. 1181-1186 - Madhusmita Panda, Santosh Kumar Patnaik, Ashis Kumar Mal, Sumalya Ghosh:
Fast and optimised design of a differential VCO using symbolic technique and multi objective algorithms. 1187-1195 - Shikhar Gupta
Effect of air spacer in underlap GAA nanowire: an analogue/RF perspective. 1196-1202 - Dongfang Pan
Compact and high-linearity 77 GHz CMOS receiver front-end for automotive radar. 1203-1208 - Prasun Datta, Shyamapada Mukherjee:
Architecture-aware routability-driven placer for large-scale mixed-size designs. 1209-1220 - Fereshteh Jafarzadehpour, Amir Sabbagh Molahosseini
New energy-efficient hybrid wide-operand adder architecture. 1221-1231 - Mohammed Shoukry, Fayez Gebali, Panajotis Agathoklis:
Decimator systolic arrays design space exploration for multirate signal processing applications. 1232-1240 - Zhekang Dong
Hybrid dual-complementary metal-oxide-semiconductor/memristor synapse-based neural network with its applications in image super-resolution. 1241-1248 - Umer F. Ahmed
Non-linear compact model for FinFETs output characteristics. 1249-1254 - Shubham Negi
Analytical modelling and parameters extraction of multilayered OLED. 1255-1261 - Ching-Ying Huang
Analysis and design of wideband active power splitter with interleaf transmission line topology. 1262-1266 - Mohan Appikonda
Modelling and control of dual input boost converter with voltage multiplier cell. 1267-1276 - Chang-Kyo Lee
Noise analysis of replica driving technique and its verification to 12-bit 200 MS/s pipelined ADC. 1277-1283 - Weibin Zhu
Design of a precise subdivision system for gratings using a modified CORDIC algorithm. 1284-1291 - Sumedha Dasgupta, Chandrima Mondal, Abhijit Biswas:
Role of grooving angle of 14-nm-InAs channel quantum well MOSFETs in improving analogue/RF and linearity performance. 1292-1298 - Bassem Jmai
Modelling, design and fabrication of a novel reconfigurable ultra-wide-band impedance matching based on RF MEMS technology. 1299-1304 - Avtar Singh
Design and analysis of high k silicon nanotube tunnel FET device. 1305-1310
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