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IEEE Design & Test, Volume 33
Volume 33, Number 1, February 2016
- Jörg Henkel:
Approximate Computing: Solving Computing's Inefficiency Problem? 4-5 - Qiang Xu
, Todd Mytkowicz, Nam Sung Kim:
Guest Editors' Introduction: Approximate Computing. 6-7 - Qiang Xu
Approximate Computing: A Survey. 8-22 - Donghwan Jeong, Young H. Oh
An eDRAM-Based Approximate Register File for GPUs. 23-31 - Amir Yazdanbakhsh
Mitigating the Memory Bottleneck With Approximate Load Value Prediction. 32-42 - Daya Shanker Khudia, Babak Zamirai, Mehrzad Samadi, Scott A. Mahlke:
Quality Control for Approximate Accelerators by Error Prediction. 43-50 - Boxun Li, Peng Gu, Yu Wang, Huazhong Yang:
Exploring the Precision Limitation for RRAM-Based Analog Approximate Computing. 51-58 - Bruce Querbach, Rahul Khanna, Sudeep Puligundla, David Blankenbeckler, Joseph Crop, Patrick Yin Chiang:
Architecture of a Reusable BIST Engine for Detection and Autocorrection of Memory Failures and for IO Debug, Validation, Link Training, and Power Optimization on 14-nm SoC. 59-67 - Can Hankendi, Ayse Kivilcim Coskun
Adapt&Cap: Coordinating System- and Application-Level Adaptation for Power-Constrained Systems. 68-76 - R. D. Shawn Blanton, David Yeh:
Test: Wisdom From the Giants, Visions for the Future - Part 2. 77-84 - Bill Eklow:
Recap of the ITC15 Test Conference. 85-86 - Frank Liu:
From the Heart of Silicon Valley to the Hill Country - Highlights of ICCAD 2015. 87-88 - Radovan Stojanovic, Radenka Krsmanovic Whiffen:
Report on MECO'2015. 89-90 - Theo Theocharides:
Test Technology TC Newsletter. 93-94 - Scott Davidson:
Good Enough Computing. 96
Volume 33, Number 2, April 2016
- Jörg Henkel:
Three-Dimensional Integrated Circuits. 4-6 - Daehyun Kim, Sung Kyu Lim
Guest Editors' Introduction: Advances in 3-D Integrated Circuits, Systems, and CAD Tools - Part 2. 7-8 - Shi-Yu Huang, Meng-Ting Tsai, Kun-Han Tsai, Wu-Tung Cheng:
Delay Characterization and Testing of Arbitrary Multiple-Pin Interconnects. 9-16 - Manho Lee
High-Frequency Temperature-Dependent Through-Silicon-Via (TSV) Model and High-Speed Channel Performance for 3-D ICs. 17-29 - Bing-Yang Lin, Wan-Ting Chiang, Cheng-Wen Wu
Configurable Cubical Redundancy Schemes for Channel-Based 3-D DRAM Yield Improvement. 30-39 - Caleb Serafy, Zhiyuan Yang, Ankur Srivastava
Thermoelectric Codesign of 3-D CPUs and Embedded Microfluidic Pin-Fin Heatsinks. 40-48 - Hari Chauhan, Marvin Onabajo, Vladimir Kvartenko, Robin Coxe, Theophane Weber:
An Optimization Platform for Digital Predistortion of Power Amplifiers. 49-58 - Florian Kriebel, Muhammad Shafique
Variability and Reliability Awareness in the Age of Dark Silicon. 59-67 - Vivek De:
Energy-Efficient Computing in Nanoscale CMOS. 68-75 - Sandip Ray, Yier Jin
The Changing Computing Paradigm With Internet of Things: A Tutorial Introduction. 76-96 - Rolf Ernst:
Report of the 2015 Embedded Systems Week (ESWEEK). 97-98 - Theo Theocharides:
Test Technology TC Newsletter. 101-102 - Scott Davidson:
The Five Stages of Project Grief. 104
Volume 33, Number 3, June 2016
- Jörg Henkel:
Robustness for 3-D Circuits - Industrial Perspectives. 4-5 - S. Saqib Khursheed, Pascal Vivet
Guest Editors' Introduction: Robust 3-D Stacked ICs. 6-7 - Eric Beyne
The 3-D Interconnect Technology Landscape. 8-20 - Perceval Coudrain
Experimental Insights Into Thermal Dissipation in TSV-Based 3-D Integrated Circuits. 21-36 - Kristof Croes, Joke De Messemaeker, Yunlong Li, Wei Guo, Olalla Varela Pedreira
Reliability Challenges Related to TSV Integration and 3-D Stacking. 37-45 - Frank Altmann
Innovative Failure Analysis Techniques for 3-D Packaging Developments. 46-55 - Kaushik Roy, Byunghoo Jung, Dimitrios Peroulis
Integrated Systems in the More-Than-Moore Era: Designing Low-Cost Energy-Efficient Systems Using Heterogeneous Components. 56-65 - Daniela De Venuto, Valerio F. Annese
Designing a Cyber-Physical System for Fall Prevention by Cortico-Muscular Coupling Detection. 66-76 - Qiwu Luo, Yigang He, Yichuang Sun:
Real-Time Fault Detection and Diagnosis System for Analog and Mixed-Signal Circuits of Acousto-Magnetic EAS Devices. 77-90 - Georgios Volanis, Angelos Antonopoulos
Toward Silicon-Based Cognitive Neuromorphic ICs - A Survey. 91-102 - Debdeep Mukhopadhyay:
PUFs as Promising Tools for Security in Internet of Things. 103-115 - Andrés Takach
High-Level Synthesis: Status, Trends, and Future Directions. 116-124 - Gabe Moretti:
Accellera's DVCon Conferences Focus on the Community of Practicing Engineers. 125-132 - Hidetoshi Onodera:
2016 ASP-DAC. 133-134 - Theo Theocharides:
Test Technology TC Newsletter. 140-141 - Mary Jane Irwin, Soha Hassoun:
Steven P. Levitan (1950-2016). 142-143 - Scott Davidson:
And He Built a Crooked Chip. 144
Volume 33, Number 4, August 2016
- Jörg Henkel:
Designing and Testing Implantable Medical Devices. 4-5 - Mohamad Sawan, Shuenn-Yuh Lee
Guest Editors' Introduction: Implantable Medical Devices. 6-7 - Xiao Liu, Zhulin Zong, Dai Jiang
Advances in Scalable Implantable Systems for Neurostimulation Using Networked ASICs. 8-23 - Xingyuan Tong
Multichannel Wireless Neural Recording AFE Architectures: Analysis, Modeling, and Tradeoffs. 24-36 - Takashi Tokuda
In Vitro Long-Term Performance Evaluation and Improvement in the Response Time of CMOS-Based Implantable Glucose Sensors. 37-48 - Robert Rieger
Pulse-Width-Modulating Biosignal ADC for Rapid ASIC Design and IP Core Reuse. 49-60 - Paul Jung-Ho Lee, Amine Bermak
A Multichannel Power-Supply-Modulated Microstimulator With Energy Recycling. 61-73 - Ruben Cubo
Model-Based Optimization of Individualized Deep Brain Stimulation Therapy. 74-81 - Senthil Arasu, Mehrdad Nourani
Controlling Aging in Timing-Critical Paths. 82-91 - Samarjit Chakraborty
Automotive Cyber-Physical Systems: A Tutorial Introduction. 92-108 - Marilyn Wolf
Ultralow Power and the New Era of Not-So-VLSI. 109-113 - Luca Fanucci
Recap of the 2016 DATE Conference & Exhibition. 114-117 - Theo Theocharides:
Test Technology TC Newsletter. 124-126 - Scott Davidson:
The Intestinal Superhighway. 128
Volume 33, Number 5, October 2016
- Jörg Henkel:
New Directions in Analog/Mixed-Signal Design and Test. 4 - Xin Li, Chandramouli V. Kashyap, Chris J. Myers
Guest Editors' Introduction Challenges and Opportunities in Analog/Mixed-Signal CAD. 5-6 - Anirudh Iyengar, Swaroop Ghosh, Srikant Srinivasan
Retention Testing Methodology for STTRAM. 7-15 - Jiho Lee, Jaeha Kim:
Efficient Global Optimization of Analog Circuits Using Predictive Response Surface Models on Discretized Design Space. 16-27 - Parijat Mukherjee
Using Presilicon Knowledge to Excite Nonlinear Failure Modes in Large Mixed-Signal Circuits. 28-34 - Hafiz ul Asad
Verifying Inevitability of Oscillation in Ring Oscillators Using the Deductive SOS-QE Approach. 35-43 - Vladimir Dubikhin
Design of Mixed-Signal Systems With Asynchronous Control. 44-55 - Kai He, Xin Huang, Sheldon X.-D. Tan:
EM-Based On-Chip Aging Sensor for Detection of Recycled ICs. 56-64 - Rolf Ernst, Marco Di Natale:
Mixed Criticality Systems - A History of Misconceptions? 65-74 - Farshad Khorrami
Cybersecurity for Control Systems: A Process-Aware Perspective. 75-83 - Magdy Abadir:
Creating a Successful Partnership Between Industry, Academia, and Government. 84-91 - Chuck Alpert:
Recap of the 53rd Design Automation Conference (DAC). 93-95 - Theo Theocharides:
Test Technology TC Newsletter. 101-103 - Scott Davidson:
Where Are We Going? 104
Volume 33, Number 6, December 2016
- Jörg Henkel:
Best in Test. 4 - Nicola Nicolici, Haralampos-G. D. Stratigopoulos:
Guest Editors' Introduction: Top Papers from the 2015 International Test Conference. 5-6 - Cesar Acero, Derek Feltham, Marek Patyra, Friedrich Hapke, Elham K. Moghaddam, Nilanjan Mukherjee, Vidya Neerkundar, Janusz Rajski, Jerzy Tyszer, Justyna Zawada:
On New Test Points for Compact Cell-Aware Tests. 7-14 - Masahiro Ishida, Kiyotaka Ichiyama:
An ATE System for Testing RF Digital Communication Devices With QAM Signal Interfaces. 15-22 - Shi-Yu Huang, Chih-Chieh Cheng, Meng-Ting Tsai, Kuan-Chen Huang, Kun-Han Tsai, Wu-Tung Cheng:
Versatile Transition-Time Monitoring for Interconnects via Distributed TDC. 23-30 - Kelly A. Ockunzzi
Practical Application of RAM Sequential Test. 31-37 - Stephen K. Sunter, Jean-Francois Cote, Jeff Rearick:
Streaming Access to ADCs and DACs for Mixed-Signal ATPG. 38-45 - Manuel J. Barragán, Haralampos-G. D. Stratigopoulos, Salvador Mir, Hervé Le Gall, Neha Bhargava, Ankur Bal:
Practical Simulation Flow for Evaluating Analog/Mixed-Signal Test Techniques. 46-54 - Eshan Singh, David Lin, Clark W. Barrett
Symbolic Quick Error Detection for Pre-Silicon and Post-Silicon Validation: Frequently Asked Questions. 55-62 - Kai-Hui Chang, Hong-Zu Chou, Haiqian Yu, Dylan Dobbyn, Sy-Yen Kuo
Handling Nondeterminism in Logic Simulation so That Your Waveform Can Be Trusted Again. 63-71 - Bahadir Tunaboylu:
Power Delivery Performance of Probe Test Systems for Semiconductor Wafers. 72-76 - Syed Azhar Ali Zaidi
FPGA Accelerator of Algebraic Quasi Cyclic LDPC Codes for nand Flash Memories. 77-84 - Abbas Rahimi
CIRCA-GPUs: Increasing Instruction Reuse Through Inexact Computing in GP-GPUs. 85-92 - Vijay Raghunathan, Muhammad M. Khellah
Recap of the 2016 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED 2016). 93-94 - Misha Temkin:
The 2016 DAC Art Show Winner: Misha Temkin. 95 - Ron Press
ITC and the Future of Test - We've Won. 96
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