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18th FDL 2015: Barcelona, Spain

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Session 1: Clocks and Their Applications

Special Session 1: Power Aware Modelling and Design

Session 2: FMI and SystemC-AMS

Session 3: Design and Correctness

Session 4: From MARTE Models to Initial Implementations

Special Session 2: High Integrity Multi-Core Modelling for Future Systems (Hi-MCM)