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31st ARITH 2024: Malaga, Spain
- 31st IEEE Symposium on Computer Arithmetic, ARITH 2024, Malaga, Spain, June 10-12, 2024. IEEE 2024, ISBN 979-8-3503-8432-1
- David Du Pont, Jonas Bertels
, Furkan Turan, Michiel Van Beirendonck, Ingrid Verbauwhede
Hardware Acceleration of the Prime-Factor and Rader NTT for BGV Fully Homomorphic Encryption. 1-8 - Décio Luiz Gazzoni Filho, Guilherme Brandão, Gora Adj, Arwa Alblooshi, Isaac Andrés Canales Martinez
PQC-AMX: Accelerating Saber and FrodoKEM on the Apple M1 and M3 SoCs. 9-16 - Zabihollah Ahmadpour, Ghassem Jaberipur, Jeong-A Lee:
Montgomery Modular Multiplication via Single-Base Residue Number Systems. 17-23 - Samuel Coward, Theo Drane, Emiliano Morini, George A. Constantinides:
Combining Power and Arithmetic Optimization via Datapath Rewriting. 24-31 - Tom Hubrecht, Claude-Pierre Jeannerod, Jean-Michel Muller:
Useful applications of correctly-rounded operators of the form ab + cd + e. 32-39 - David Raymond Lutz, Anisha Saini, Mairin Kroes, Thomas Elmer, Harsha Valsaraju:
Fused FP8 4-Way Dot Product With Scaling and FP32 Accumulation. 40-47 - Vassil S. Dimitrov, Richard Ford, Laurent Imbert, Arjuna Madanayake
Multiple-base Logarithmic Quantization and Application in Reduced Precision AI Computations. 48-51 - Zeynep Kaya
Novel Access Patterns Based on Overlapping Loading and Processing Times to Reduce Latency and Increase Throughput in Memory-based FFTs. 52-59 - Ping Tak, Peter Tang:
An Open-Source RISC-V Vector Math Library. 60-67 - Mantas Mikaitis:
MATLAB Simulator of Level-Index Arithmetic. 68-71 - Mikael Henriksson, Theodor Lindberg
APyTypes: Algorithmic Data Types in Python for Efficient Simulation of Finite Word-Length Effects. 72-75 - Vincent Lefèvre:
An Emacs-Cairo Scrolling Bug due to Floating-Point Inaccuracy. 76-79 - Joris van der Hoeven, Fredrik Johansson:
Fast multiple precision exp(x) with precomputations. 80-87 - Hui Chen, Lianghua Quan, Weiqiang Liu:
HGH-CORDIC: A High-Radix Generalized Hyperbolic COordinate Rotation Digital Computer. 88-95 - Denis Arzelier, Florent Bréhard, Mioara Joldes, Marc Mezzarobba:
Rounding Error Analysis of an Orbital Collision Probability Evaluation Algorithm. 96-103 - Martin Langhammer, Bogdan Pasca, Igor Kucherenko:
Multiplier Architecture with a Carry-Based Partial Product Encoding. 104-107 - Theo Drane, Samuel Coward, Mertcan Temel, Joe Leslie-Hurd:
On the Systematic Creation of Faithfully Rounded Commutative Truncated Booth Multipliers. 108-115 - Ziying Cui, Ke Chen, Bi Wu, Chenggang Yan, Yu Gong, Weiqiang Liu:
A Time Efficient Comprehensive Model of Approximate Multipliers for Design Space Exploration. 116-123 - Andreas Böttcher, Martin Kumm:
Small Logic-based Multipliers with Incomplete Sub-Multipliers for FPGAs. 124-131 - Raul Murillo, Alberto A. Del Barrio, Guillermo Botella:
Square Root Unit with Minimum Iterations for Posit Arithmetic. 132-138 - José T. de Sousa, João D. Lopes, Micaela Serôdio, Horácio C. Neto, Mário P. Véstias:
PT-Float: A Floating-Point Unit with Dynamically Varying Exponent and Fraction Sizes. 139-146
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