• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 98 matches

• 2005
• 
  Cristinel Ababei, Yan Feng, Brent Goplen, Hushrav Mogal, Tianpei Zhang, Kia Bazargan, Sachin S. Sapatnekar:
  Placement and Routing in 3D Integrated Circuits. IEEE Des. Test Comput. 22(6): 520-531 (2005)
• 
  Robert C. Aitken:
  ITC is Cool. IEEE Des. Test Comput. 22(6): 616 (2005)
• 
  R. Iris Bahar, Mehdi Baradaran Tahoori, Sandeep K. Shukla, Fabrizio Lombardi:
  Guest Editors' Introduction: Challenges for Reliable Design at the Nanoscale. IEEE Des. Test Comput. 22(4): 295-297 (2005)
• 
  Robert Baumann:
  Soft Errors in Advanced Computer Systems. IEEE Des. Test Comput. 22(3): 258-266 (2005)
• 
  Jürgen Becker, Alexander Thomas:
  Scalable Processor Instruction Set Extension. IEEE Des. Test Comput. 22(2): 136-148 (2005)
• 
  Peter Benkart, Alexander Kaiser, Andreas Munding, Markus Bschorr, Hans-Jörg Pfleiderer, Erhard Kohn, Arne Heittmann, Holger Huebner, Ulrich Ramacher:
  3D Chip Stack Technology Using Through-Chip Interconnects. IEEE Des. Test Comput. 22(6): 512-518 (2005)
• 
  Victor Berman:
  Is it time to reexamine patent policy for standards? IEEE Des. Test Comput. 22(1): 71-73 (2005)
• 
  Victor Berman:
  Sharing standards work with Japan. IEEE Des. Test Comput. 22(2): 182-183 (2005)
• 
  Victor Berman:
  IEEE P1647 and P1800: Two approaches to standardization and language design. IEEE Des. Test Comput. 22(3): 283-285 (2005)
• 
  Victor Berman:
  An update on IEEE P1647: The e system verification language. IEEE Des. Test Comput. 22(5): 484-486 (2005)
• 
  Christophe Bobda, Ali Ahmadinia:
  Dynamic Interconnection of Reconfigurable Modules on Reconfigurable Devices. IEEE Des. Test Comput. 22(5): 443-451 (2005)
• 
  Juan Antonio Carballo, Yervant Zorian, Raul Camposano, Andrzej J. Strojwas, John Kibarian, Dennis Wassung, Alex Alexanian, Steve Wigley, Neil Kelly:
  Guest Editors' Introduction: DFM Drives Changes in Design Flow. IEEE Des. Test Comput. 22(3): 200-205 (2005)
• 
  Luigi Carro:
  Adding value to design and test through education: What are the challenges? IEEE Des. Test Comput. 22(4): 388, 390 (2005)
• 
  R. Chandramouli:
  Infrastructure IP design for repair in nanometer technologies. IEEE Des. Test Comput. 22(1): 17 (2005)
• 
  Mark L. Chang, Scott Hauck:
  Précis: A Usercentric Word-Length Optimization Tool. IEEE Des. Test Comput. 22(4): 349-361 (2005)
• 
  Chen Chang, John Wawrzynek, Robert W. Brodersen:
  BEE2: A High-End Reconfigurable Computing System. IEEE Des. Test Comput. 22(2): 114-125 (2005)
• 
  Scott Davidson:
  Testing: It's not just pass/fail anymore. IEEE Des. Test Comput. 22(1): 80 (2005)
• 
  Scott Davidson:
  BIST the hard way. IEEE Des. Test Comput. 22(4): 386-387 (2005)
• 
  Scott Davidson:
  What's the problem? IEEE Des. Test Comput. 22(4): 392 (2005)
• 
  Scott Davidson:
  Guest Editor's Introduction: ITC Examines How Test Helps the Fittest Survive. IEEE Des. Test Comput. 22(6): 565 (2005)
• 
  W. Rhett Davis, John M. Wilson, Stephen E. Mick, Jian Xu, Hao Hua, Christopher Mineo, Ambarish M. Sule, Michael B. Steer, Paul D. Franzon:
  Demystifying 3D ICs: The Pros and Cons of Going Vertical. IEEE Des. Test Comput. 22(6): 498-510 (2005)
• 
  André DeHon, Helia Naeimi:
  Seven Strategies for Tolerating Highly Defective Fabrication. IEEE Des. Test Comput. 22(4): 306-315 (2005)
• 
  Brian Delaney, Tajana Simunic, Nikil Jayant:
  Energy-Aware Distributed Speech Recognition for Wireless Mobile Devices. IEEE Des. Test Comput. 22(1): 39-49 (2005)
• 
  Kees Goossens, John Dielissen, Andrei Radulescu:
  Æthereal Network on Chip: Concepts, Architectures, and Implementations. IEEE Des. Test Comput. 22(5): 414-421 (2005)
• 
  Rajesh K. Gupta:
  Global competitiveness, outsourcing, and education in the semiconductor industry. IEEE Des. Test Comput. 22(1): 5-6 (2005)
• 
  Rajesh K. Gupta:
  FPGA-enabled computing architectures. IEEE Des. Test Comput. 22(2): 81 (2005)
• 
  Rajesh K. Gupta:
  The other face of design for manufacturability. IEEE Des. Test Comput. 22(3): 193 (2005)
• 
  Rajesh K. Gupta:
  Nanotechnology: Where science of the small meets math of the large. IEEE Des. Test Comput. 22(4): 289, 294 (2005)
• 
  Rajesh K. Gupta:
  On-chip networks. IEEE Des. Test Comput. 22(5): 393 (2005)
• 
  Rajesh K. Gupta:
  Going 3D: Silicon and D&T. IEEE Des. Test Comput. 22(6): 493-494 (2005)

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