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Publication search results
found 76 matches
- 2017
- Binod Kumar, Kanad Basu, Ankit Jindal, Brajesh Pandey, Masahiro Fujita:
A Formal Perspective on Effective Post-silicon Debug and Trace Signal Selection. VDAT 2017: 753-766 - Satyadev Ahlawat, Darshit Vaghani, Jaynarayan T. Tudu, Ashok Suhag:
A Cost Effective Technique for Diagnosis of Scan Chain Faults. VDAT 2017: 191-204 - Antara Ain, Sayandeep Sanyal, Pallab Dasgupta:
A Framework for Automated Feature Based Mixed-Signal Equivalence Checking. VDAT 2017: 779-791 - Naushad Ali, Bharat Garg:
New Energy Efficient Reconfigurable FIR Filter Architecture and Its VLSI Implementation. VDAT 2017: 519-532 - N. S. Aswathy, R. S. Reshma Raj, Abhijit Das, John Jose, V. R. Josna:
Adaptive Packet Throttling Technique for Congestion Management in Mesh NoCs. VDAT 2017: 337-344 - Rajul Bansal, Mahendra Kumar Jatav, Abhijit Karmakar:
A Lifting Instruction for Performing DWT in LEON3 Processor Based System-on-Chip. VDAT 2017: 731-736 - Mudasir Bashir, Sreehari Rao Patri, K. S. R. Krishna Prasad:
A Low Power, Frequency-to-Digital Converter CMOS Based Temperature Sensor in 65 nm Process. VDAT 2017: 657-666 - M. Mohamed Asan Basiri, Sandeep K. Shukla:
Flexible Composite Galois Field GF((2m)2) Multiplier Designs. VDAT 2017: 3-14 - Kanad Basu, Rishi Kumar, Santosh Kulkarni, Rohit Kapur:
Deterministic Shift Power Reduction in Test Compression. VDAT 2017: 155-167 - Anshu Bhardwaj, Subir Kumar Roy:
Defeating HaTCh: Building Malicious IP Cores. VDAT 2017: 345-353 - Rahul Bhattacharya, S. H. M. Ragamai, Subindu Kumar:
SFG Based Fault Simulation of Linear Analog Circuits Using Fault Classification and Sensitivity Analysis. VDAT 2017: 179-190 - Arpan Chakraborty, Piyali Datta, Debasis Dhal, Rajat Kumar Pal:
A Dependability Preserving Fluid-Level Synthesis for Reconfigurable Droplet-Based Microfluidic Biochips. VDAT 2017: 694-706 - Subhajit Chatterjee, Surajit Kumar Roy, Chandan Giri, Hafizur Rahaman:
Modeling and Analysis of Transient Heat for 3D IC. VDAT 2017: 365-375 - Neha Chaudhuri, Chandan Bandyopadhyay, Hafizur Rahaman:
Improving the Design of Nearest Neighbor Quantum Circuits in 2D Space. VDAT 2017: 421-426 - Rituparna Choudhury, P. Rangababu:
Design and Implementation of Mixed Parallel and Dataflow Architecture for Intra-prediction Hardware in HEVC Decoder. VDAT 2017: 742-750 - Avishek Choudhury, Biplab K. Sikdar:
Performance Analysis of Disability Based Fault Tolerance Techniques for Permanent Faults in Chip Multiprocessors. VDAT 2017: 217-224 - Ramanuj Chouksey, Chandan Karfa, Purandar Bhaduri:
Translation Validation of Loop Invariant Code Optimizations Involving False Computations. VDAT 2017: 767-778 - Pallavi G. Darji, Chetan D. Parikh:
A Calibration Technique for Current Steering DACs - Self Calibration with Capacitor Storage. VDAT 2017: 103-114 - Moumita Das, Ansuman Banerjee, Bhaskar Sardar:
A Framework for Branch Predictor Selection with Aggregation on Multiple Parameters. VDAT 2017: 69-74 - Surajit Das, Chandan Karfa, Santosh Biswas:
xMAS Based Accurate Modeling and Progress Verification of NoCs. VDAT 2017: 792-804 - K. Dheepika, K. S. Jevasankari, Vippin Chandhar, Binsu J. Kailath:
Realization of Multiplier Using Delay Efficient Cyclic Redundant Adder. VDAT 2017: 36-47 - G. Hanumanta Rao, S. Rekha:
Low Voltage, Low Power Transconductor for Low Frequency G_m -C Filters. VDAT 2017: 83-92 - Prokash Ghosh, Jyotirmoy Ghosh:
A Configurable and Area Efficient Technique for Implementing Isolation Cells in Low Power SoC. VDAT 2017: 619-627 - Puja Ghosh, P. Rangababu:
Design and Implementation of Ternary Content Addressable Memory (TCAM) Based Hierarchical Motion Estimation for Video Processing. VDAT 2017: 557-569 - Anshu Goel, Rohini Gulve:
Multi-mode Toggle Random Access Scan to Minimize Test Application Time. VDAT 2017: 205-216 - Naman Govil, Rahul Shrestha, Shubhajit Roy Chowdhury:
A New Multi-objective Hardware-Software-Partitioning Algorithmic Approach for High Speed Applications. VDAT 2017: 62-68 - Sumanth Gudaparthi, Rahul Shrestha:
Energy-Efficient VLSI Architecture & Implementation of Bi-modal Multi-banked Register-File Organization. VDAT 2017: 299-312 - Jasmine Kaur Gulati, Bhanu Prakash, Sumit Jagdish Darak:
An Efficient Timing and Clock Tree Aware Placement Flow with Multibit Flip-Flops for Power Reduction. VDAT 2017: 581-593 - Rohini Gulve, Nihar Hage:
On Generation of Delay Test with Capture Power Safety. VDAT 2017: 607-618 - Yatharth Gupta, Sujay Deb, Vikrant Singh, V. N. Srinivasan, Manish Sharma, Sabyasachi Das:
Pseudo-BIST: A Novel Technique for SAR-ADC Testing. VDAT 2017: 168-178
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