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"Current-limited switch-level timing simulator for MOS logic networks."

Genhong Ruan, Jirí Vlach, James A. Barby (1988)

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DOI: 10.1109/43.3205

access: closed

type: Journal Article

metadata version: 2020-09-24

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Genhong Ruan, Jirí Vlach, James A. Barby:
Current-limited switch-level timing simulator for MOS logic networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7(6): 659-667 (1988)

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