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"A 10 GHz Dual-Loop PLL With Active Cycle-Jitter Correction Achieving 12dB ..."

Yu-Ping Huang, Yu-Sian Lu, Wei-Zen Chen (2024)

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DOI: 10.1109/OJCAS.2024.3416397

access: open

type: Journal Article

metadata version: 2024-09-23

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Yu-Ping Huang, Yu-Sian Lu, Wei-Zen Chen:
A 10 GHz Dual-Loop PLL With Active Cycle-Jitter Correction Achieving 12dB Spur and 29% Jitter Reduction. IEEE Open J. Circuits Syst. 5: 291-301 (2024)

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