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"Tight Upper Bound for Accelerating Reconfiguration of VLSI Arrays."

Jigang Wu, Xiaogang Han (2015)

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DOI: 10.1142/S0218126615500991

access: closed

type: Journal Article

metadata version: 2020-08-25

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Jigang Wu, Xiaogang Han:
Tight Upper Bound for Accelerating Reconfiguration of VLSI Arrays. J. Circuits Syst. Comput. 24(7): 1550099:1-1550099:10 (2015)

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