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"High-Speed Arithmetic Coder/Decoder Architectures."

Gireesh Shrimali, Keshab K. Parhi (1993)

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DOI: —

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type: Conference or Workshop Paper

metadata version: 2024-07-03

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  dblp key:
  - conf/ppsc/ShrimaliP93
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  persistent URL:
  - https://dblp.org/rec/conf/ppsc/ShrimaliP93
Gireesh Shrimali, Keshab K. Parhi:
High-Speed Arithmetic Coder/Decoder Architectures. PPSC 1993: 1025-1032

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